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基于多端口存储器互连结构的多处理器系统芯片设计
引用本文:曾凡太, 安惴.依万诺夫,. 基于多端口存储器互连结构的多处理器系统芯片设计[J]. 电子器件, 2007, 30(4): 1200-1203
作者姓名:曾凡太   安惴.依万诺夫  
作者单位:山东大学信息学院,实验中心,济南,250100;不列颠哥伦比亚大学电气和计算机工程系,Vancouver,BC,V6T1Z4,加拿大
摘    要:多处理器系统芯片设计的关键问题之一是微处理器之间的互连结构.在总线互连结构和开关互连结构之后,提出了基于多端口存储器的第3种互连结构.利用VHDL进行了多时钟多端口存储器设计,并利用EDA工具进行了片上系统芯片的多微处理器数据通讯的功能仿真.分析了基于总线、基于开关、基于多端口存储器的3种互连结构的特点.研究表明基于多端口存储器的互连结构具有异步数据传输,数据缓冲功能;具有数据传输延时小,多微处理器系统芯片的拓扑阵列规模可扩展的优点.

关 键 词:多微处理器片上系统  片上网络  互连结构  基于多端口存储器  基于总线  基于开关
文章编号:1005-9490(2007)04-1200-04
修稿时间:2006-04-14

MPM-Based Interconnect Architecture for Design of MP-SoC
ZENG Fan-tai,André Ivanov. MPM-Based Interconnect Architecture for Design of MP-SoC[J]. Journal of Electron Devices, 2007, 30(4): 1200-1203
Authors:ZENG Fan-tai  André Ivanov
Affiliation:1.Experiment Center School of Information Science and Engineering Shandong University , Jinan 250100,China; 2.SoC Research Lab Department of Electrical and Computer Engineering University of British Columbia Vancouver, BC,V6T1Z4, Canada
Abstract:One of the important questions is interconnect architecture between multi-processors in design of system on chip.We propose a third kind network on chip interconnect architecture that is multi-port memories-based interconnect architecture behind of the bus-based and switch-based interconnect architecture.We use VHDL design the multi-clock,multi-port memories,serve simulation function of data transfer between multi-processors with EDA tools and analyze the characteristic of bus-based,switch-based,MPM-based interconnect architecture.Research shows the MPM-based interconnect architecture has asynchronous data transfer,data buffer function.It has the strongpoint to cut down latency time of data transfer between processors and the matrix topology of MP-SOC is extendable.
Keywords:MP-SoC(Multi-processors System on Chips)  Network on Chip Interconnect Architecture  Multi-port Memories(MPM)-based  Bus-based  Switch-based
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