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基于FPGA的实时双目图像采集与预处理系统设计
引用本文:任梦茹,侯宏录.基于FPGA的实时双目图像采集与预处理系统设计[J].自动化与仪表,2020(1):58-61,75.
作者姓名:任梦茹  侯宏录
作者单位:西安工业大学光电工程学院
摘    要:针对目前智能交通监控系统中动态目标数据量大、噪声干扰多、实时性要求高等问题,设计了基于FPGA的实时双目图像采集与预处理系统。利用FPGA的并行特性和流水线技术,实时采集双通道图像数据,且通过DDR3 SDRAM缓存,再将其用拼接方式输出显示;采用像素排序流水线操作,实现了基于FPGA的并行中值滤波算法,提高了算法处理速度。试验结果表明,所设计的双目图像采集与预处理系统能够实现图像的实时采集与显示,并能快速地进行图像降噪处理。

关 键 词:双目图像采集  图像预处理  并行中值滤波  现场可编程门阵列  DDR3  SDRAM  I2C总线

Design of Real-time Binocular Image Acquisition and Preprocess System Based on FPGA
REN Meng-ru,HOU Hong-lu.Design of Real-time Binocular Image Acquisition and Preprocess System Based on FPGA[J].Automation and Instrumentation,2020(1):58-61,75.
Authors:REN Meng-ru  HOU Hong-lu
Affiliation:(Institute of Optoelectronic Engineering,Xi’an Technological University,Xi’an 710021,China)
Abstract:In order to solve the problems of large dynamic target data volume,more noise interference and high realtime requirements in the current intelligent traffic monitoring system,a real-time binocular image acquisition and preprocess system based on FPGA was designed in this paper. Using the parallel characteristics of FPGA and pipeline technology,real-time acquisition of dual channel image data,and through DDR3 SDRAM cache,and then it is displayed by splicing. The parallel median filter algorithm based on FPGA is implemented by using pixel sorting pipeline operation,which improves the processing speed of the algorithm. Experimental results show that the binocular image acquisition and preprocess system can achieve real-time image acquisition and display by this design,and the image noise can be reduced quickly.
Keywords:binocular image acquisition  image preprocess  parallel median filter  field programmable gate array(FPGA)  DDR3 SDRAM  I2C bus
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