LFM脉冲压缩的FPGA时域实现

为解决频域法实现线性调频(LFM)脉冲压缩时硬件开销较大的问题,采用时域法实现。针对间距为20m的两目标LFM信号,设计了一款64阶分布式FIR时域匹配滤波器；采用全流水线并行处理结构实现,并利用FPGA的ROM宏模块构建查找表代替乘法运算,既提高了运算速度又减小了硬件开销。基于FPGA器件EP2C35F672C8完成了LFM信号时域脉冲压缩的逻辑设计与集成。仿真结果显示,系统占用2268个逻辑单元、1573个寄存器、27K字节存储器资源。

Time domain implementation of LFM pulse compression by FPGA

To solve the problem that the hardware overhead of the linear frequency modulated (LFM) pulse compression is large when realized in frequency domain, the time domain implementation method was used in this paper. A 64th-order distributed matched filter is designed for the LFM signal of two targets 20 meters away. The filter was implemented in pipeline-liked parallel competition structure, and the lookup table was built to replace the multiplication by using ROM macro-module of FPGA, which improved the operating speed while reduced the hardware overhead. The logic circuit of the filter was designed and integrated in FPGA device EP2C35F672C8. The simulated results indicate that the filter consumes 2268 logic cells, 1573 registers and 27K bytes memory resources.