高性能可编程互连资源设计研究

传统的可编程互联结构在短距离互连上往往采用单管、中距离上有双向线,这使得在CLB中查找表(LUT)数目变大后,互连上的延迟会随线长增加而呈指数增长.本文提出了一种改进的高性能互连结构,改进了短、中和长距离互连,使得其在CLB中LUT数目增加的情况下让芯片拥有更好的互连延迟特性,通过对这种互连结构和传统的互连结构进行建模...

High Performance Programmable Interconnect Resource Design Investigation

Conventional FPGAs use transistor switch in short range interconnection and bidirectional mid range lines,which would make the interconnection delay grows exponentially with the wire length as the number of Look Up Table(LUT) in CLB increases.In this article,we present an improved high performance routing architecture,whose short,mid and long range lines are improved to make the interconnect resource has a better delay performance when the CLB tends to become larger and contains more programmable logic reso...