一种降低高频噪声的前置全差分运算放大器

提出了一种降低高频噪声的前置全差分放大器.运放内部采用了两组偏置电路,一组用于单位增益缓冲器电路,一组用于放大电路.为了确保电路稳定性又不增加设计难度,将单位增益缓冲器电路与共模反馈回路结合起来.设计采用HHNEC 0.18μm BCD工艺,Cadence Spectre仿真表明,正常工作时共模反馈的环路增益84.93dB,单位增益带宽9.52MHz,相位裕度67.62°;启动时单位增益缓冲器电路的环路增益85.18dB,单位增益带宽8.93MHz,相位裕度67.2°;关断时,单位增益缓冲器电路的环路增益63.26dB,单位增益带宽2.28MHz,相位裕度88.66°.实测表明,设计降低了D类音频功放在开启和关断时的噪声.

A Pre Fully Differential Operational Amplifier with Lower High-frequency Noise

A pre fully differential operational amplifier with lower high-frequency noise was proposed in this paper.Two sets of inter bias circuit was used,one for unity gain buffer circuit,another for amplification.In order to ensure the stability of the circuit and reduce design difficulty,the unity gain buffer circuit and the common-mode feedback loop was combined.The circuit was implemented in HHNEC 0.18 μm BCD technology.The Cadence Spectre simulation results showed that the common-mode feedback loop had a loop gain of 84.93 dB,unity-gain bandwidth of 9.52 MHz and phase margin of 67.62° when working,the unity gain buffer circuit had a loop gain of 85.18 dB,unity-gain bandwidth of 8.93 MHz and phase margin of 67.2° when starting,and had a loop gain of 63.26 dB,unity-gain bandwidth of 2.28 MHz and phase margin of 88.66° when turning off.Test results show that the design reduced the output noise of the Class D Audio Power Amplifier when starting or turning off.