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基于ATPG的无线接入芯片的可测试性设计
引用本文:郭慧晶,苏志雄,周剑扬. 基于ATPG的无线接入芯片的可测试性设计[J]. 现代电子技术, 2006, 29(24): 117-119,122
作者姓名:郭慧晶  苏志雄  周剑扬
作者单位:厦门大学,信息科学与技术学院,福建,厦门,361005
摘    要:可测试性设计是现代芯片设计中的关键环节,针对无线接入芯片的可测试性设计对测试技术有更高的要求。首先概述可测试性设计和测试向量自动生成理论,然后采用最新的测试向量自动生成技术,根据自行设计的无线接入芯片的内部结构及特点,建立一套无线接入芯片可测试性设计的方案。同时功能测试向量的配合使用,使得设计更为可靠。最终以最简单灵活的方法实现了该芯片的可测试性设计。

关 键 词:DFT  扫描链  ATPG  stuckat
文章编号:1004-373X(2006)24-117-03
收稿时间:2006-06-22
修稿时间:2006-06-22

Testability Design of Wireless Chip Based on ATPG
GUO Huijing,SU Zhixiong,ZHOU Jianyang. Testability Design of Wireless Chip Based on ATPG[J]. Modern Electronic Technique, 2006, 29(24): 117-119,122
Authors:GUO Huijing  SU Zhixiong  ZHOU Jianyang
Affiliation:College of Etectronic Science and Technology, Xiamen University, Xiamen, 361005, China
Abstract:Design for test is an important process in the chip design nowadays,testability design of wireless chip needs a much higher requirement of test technology.Design for test and automatic test-pattern generation technology is first introduced in this paper,then based on the internal structure and character of wireless chip,the advanced automatic test-pattern generation technology is used in the design to build a scheme of testability chip.Functional test-pattern is used simultaneity to make the design more available.Finally,the most simply and agilely method is used to implement the design.
Keywords:DFT  scan chain  ATPG  stuck-at
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