可重构阵列处理器光电混合互连原型系统实现

高效视频编码(HEVC)标准在提升编码性能的同时,对系统带宽提出了更高的要求。传统电互连方式存在带宽小和时延大的问题,而光互连的高带宽和低功耗为片上资源数据通信提出了新的解决方案。然而由于工艺水平的限制,集成光器件无法在现场可编程门阵列(FPGA)芯片内部实现。采用片外光器件模拟片上光互连系统可以达到原型验证的目的。文章基于BEE4开发平台在单片上采用电互连方式进行数据通信,在Xilinx V6系列芯片间通过接入4通道小型可插拔+(QSFP+)光模块搭建光通信链路,构建光通信网络,实现了光电混合互连网络原型系统。以分辨率176×144的标准测试序列akiyoqcif176×144.yuv为例进行测试,实验结果表明,以光链路替代片间电通信能够正确实现,且板间传输时间仅为电互连的一半,综合频率为51.327 MHz。

Implementation of Photoelectric Hybrid Interconnect Prototype System for Reconfigurable Video Array Processor

High Efficiency Video Coding(HEVC) standard puts higher requirements on system bandwidth while improving the coding performance. The traditional electrical interconnection method has the problems of small bandwidth and large delay. Therefore, the high bandwidth and low power consumption of the optical interconnection propose a new solution for on-chip resource data communication. However, due to the limitation of the process level, the integrated optical device cannot be implemented inside the Field Programmable Gate Array(FPGA) chip. Therefore, the off-chip optical device is used to simulate the on-chip optical interconnection system to achieve the purpose of prototype verification. In this paper, based on the BEE4 development platform, the electrical interconnection is used for data communication on a single chip. The optical communication link is built by connecting Quad Small Form-factor Pluggable Plus(QSFP+) optical modules between Xilinx V6 series FPGA chips, and an optical communication network is constructed to realize the prototype of the optical hybrid interconnection network system. Taking the standard test sequence akiyoqcif176×144.yuv with resolution of 176×144 as an example, experimental results show that the optical link can replace the inter-chip electrical communication correctly, and the transmission time between boards is only half of electrical interconnection with integrated frequency of 51.327 MHz.