Blind equalization of time errors in a time-interleaved ADC system

To significantly increase the sampling rate of an analog-to-digital converter (ADC), a time-interleaved ADC system is a good option. The drawback of a time-interleaved ADC system is that the ADCs are not exactly identical due to errors in the manufacturing process. This means that time, gain, and offset mismatch errors are introduced in the ADC system. These errors cause distortion in the sampled signal. In this paper, we present a method for estimation and compensation of the time mismatch errors. The estimation method requires no knowledge about the input signal, except that it should be band limited to the foldover frequency /spl pi//T/sub s/ for the complete ADC system. This means that the errors can be estimated while the ADC is running. The method is also adaptive to slow changes in the time errors. The Cramer-Rao bound (CRB) for the time error estimates is also calculated and compared to Monte Carlo simulations. The estimation method has also been validated on measurements from a real time-interleaved ADC system with 16 ADCs.