A 144-Mb, eight-level NAND flash memory with optimized pulsewidthprogramming |
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| Authors: | Nobukata H Takagi S Hiraga K Ohgishi T Miyashita M Kamimura K Hiramatsu S Sakai K Ishida T Arakawa H Itoh M Naiki I Noda M |
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| Affiliation: | Memory Dept., Sony Corp. Core Technol. & Network Co., Tokyo; |
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| Abstract: | We report a fast-programming, compact sense and latch (SL) circuit to realize an eight-level NAND flash memory. Fast programming is achieved by supplying optimized voltage and pulsewidth to the bit lines, according to the programming data. As a result, all data programming is completed almost simultaneously, and 0.67-MB/s program throughput, which is 1.7 times faster than conventional program throughput, is achieved. The compact layout of the SL circuit is made possible by four 3-bit latches sharing one unit of the read/verify control circuit. Using these techniques, we fabricated a 144-Mb, eight-level NAND flash memory using a 0.35-μm CMOS process, resulting in a 104.2-mm2 die size and a 1.05-μm2 effective cell size |
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