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FPGA的UART设计和实现
引用本文:李海平,孔祥成. FPGA的UART设计和实现[J]. 中国科学院研究生院学报, 2010, 27(2): 199-203
作者姓名:李海平  孔祥成
作者单位:1. 中国科学院高能物理研究所,北京,100049;中国科学院研究生院,北京,100190
2. 中国科学院高能物理研究所,北京,100049
摘    要:在工程中需要进行FPGA与上位机的通信,根据现场情况选择了UART的RS-232C接口标准规范和总线标准规范进行驱动设计.驱动主要是针对近距离串口通信设计,采用了异步通信协议,同时利用FCS校验来保证通信数据的完整性和准确性.程序采用VHDL硬件语言进行编写.通过长时间测试,运行稳定可靠,并且能够提供一定的抗干扰能力.驱动的实现为FPGA与上位机的通信提供了一种可靠的方式,具有较强的实用意义.

关 键 词:FPGA  RS-232C驱动  VHDL  FCS校验
收稿时间:2009-11-10
修稿时间:2009-12-07

Design and implementation of FPGA UART
LI Hai-Ping,KONG Xiang-Cheng. Design and implementation of FPGA UART[J]. Journal of the Graduate School of the Chinese Academy of Sciences, 2010, 27(2): 199-203
Authors:LI Hai-Ping  KONG Xiang-Cheng
Affiliation:1. Institute of High Energy Physics, Chinese Academy of Sciences, Beijing 100049, China;2. Graduate University, Chinese Academy of Sciences, Beijing 100190, China
Abstract:In the project, the FPGA is required to communicate with the host computer. According to the conditions of the project, RS232C is chosen as a standard bus protocol and interface specification to design the UART driver. The goal of the design is to fulfill the communication in a short range. The design uses asynchronous communication and the FCS to keep the signal integrity and the veracity of the communication data. The software is programmed in VHDL language. Through long time testing, the driver is stable in working in the whole system and owns the capability to correct some errors in the data. The design of the driver provides a reliable means for the communication between the host computer and the FPGA and it is of deep significance.
Keywords:FPGA  VHDL  FPGA  RS-232C driver  VHDL  FCS checkout
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