冲击信号处理芯片设计、实现及应用

基于可编程门阵列(FPGA)完成了三通道冲击信号处理芯片的设计与实现。芯片采用流水运算完成最大绝对冲击加速度响应谱计算。由于冲击信号采样频率可在线更改,因此该芯片可以满足不同冲击信号处理器对峰值检测误差的要求和处理器功耗的限制。采用该芯片设计的数据预处理器已成功用于各种试验。试验表明,该芯片能实时完成三路冲击信号处理并将处理结果代替冲击波原始测量数据输出,能在大幅度压缩冲击信号传输带宽的同时,减小冲击信号峰值检测误差,扩大信号测量动态范围,并为识别数据“真”“伪”创造了条件。

Design and efficient implementation of airborne shock signal process chip based on FPGA

Design, implementation and application of a three-channel airborne shock signal process chip based on FPGA is described. Pipeline processing can ensure the time of computing the peak acceleration for a single-degree-of freedom system. It provides good conditions for optimizing the design parameters of the whole device because the power consumption of the device and processing accuracy of MaxiMax Shock Spectrum mainly depend on the sampling frequency, at the same time both are conflicting. After lots of tests, airborne processors with the chip have been applied to several experiments. As a result, bandwidth of shock signals is greatly compressed by processing shock signal on board. In addition signal peak detection error is reduced and measurement dynamic range is extended. Moreover, verification of the data becomes much easier on the ground.