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Incremental Polygon Rendering on a SIMD Processor Array
Authors:Theohaiis Theoharis  Ian Page
Affiliation:st. Catharine's college Cambridge CB2 1RL England;Oxford University Computing Laboratory 8–11 Kcble Road Oxford OX1 3QD Ensland
Abstract:We demonstrate how both area coherence and parallelism can be exploited in order to speed up rendering operations on a SIMD square array of processors. Our algorithms take advantage of the method of differences, in order to incrementally compute the values of a linear polynomial function at discrete intervals and thus implement area rendering operations efficiently. We discuss how filling of convex polygons, hidden surface elimination and smooth shading can be implemented on an N × N processor array that supports planar arithmetic, that is, arithmetic operations performed on N × N matrices in parallel for all matrix elements. A major attraction of the method we present is that it is based on a SIMD processor array; such machines are now recognised as highly general purpose given the wide range of applications successfully implemented on them.
Keywords:area coherence    incremental methods    filling    hidden surface elimination    smooth shading    Single Instruction Multiple Data stream (SIMD)    Frame Buffer    z-Buffer
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