基于多现场可编程门阵列异构平台的 流水线技术优化方法

该研究提出了一种基于多现场可编程门阵列异构平台的流水线技术优化方法。首先，基于二 分法思想对任务进行划分，使任务量尽可能均衡地部署在不同现场可编程门阵列单元中，从而提高板 级流水线均衡度；其次，针对板间传输延迟进行了流水线结构的优化，在板间延迟较大时，将板间延 迟作为流水线的一级可以提高平台吞吐率；最后，并行优化计算单元内部模块，并通过数据关系重 排、循环展开、循环流水线等手段充分利用现场可编程门阵列计算资源，提高吞吐率和能效比。采用 AlexNet 网络为例进行的验证结果显示，与优化之前的流水线结构相比，改进后的流水线结构吞吐率 提高了 215.6%，能效比提高了 105.5%，单次任务运行时间减少了 36.6%。

Optimization Methods of Pipeline Technique Based on Multi-field Programmable Gate Array Heterogeneous Platform

This paper presents an optimal pipeline processing method based on multi-FPGA (field programmable gate array) heterogeneous platform. Firstly, the task is divided according to the dichotomy scheme, so that the task quantity can be deployed in each FPGA unit as evenly as possible. And the balance degree of board-level pipeline can be improved. Secondly, the optimization of pipeline structure is applied for the inter-board transmission delay. While the inter-board delay is large, the inter-board delay can be taken as one stage of the pipeline to improve the throughput of the platform. Finally, the computing unit is optimized in parallel, and the FPGA resources are fully utilized by means of data relation rearrangement, loop unroll and loop pipeline, etc. As the result, throughput and energy efficiency of the data processing system can be improved. The AlexNet was used for the experiment to verify the effectiveness of the proposed method. Experimental results showed that, compared with original pipeline structure, throughput of the optimized pipeline structure can be improved by 215.6%, the energy efficiency can be increased by 105.5%, and the running time of a single task can be reduced by 36.6%.