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基于FPGA的平方根升余弦滤波器设计
引用本文:张松轶. 基于FPGA的平方根升余弦滤波器设计[J]. 无线电通信技术, 2012, 38(3): 43-46
作者姓名:张松轶
作者单位:河北远东哈里斯通信有限公司,河北石家庄,050200
基金项目:2010年度电子信息产业发展基金第一批项目(工信部财[2010]301号)城市轨道交通专业通信和指挥调度系统应用示范
摘    要:为了满足陆上集群无线电(TETRA)数字集群系统对基带信号成形处理的要求,提出了一种用于TETRA数字集群系统的平方根升余弦(SRRC)滤波器设计,论述了基带成形滤波和SRRC滤波器的基本原理,分析了窄带调制带宽限制、TETRA邻道干扰限制和滤波器阶数等需解决的问题,论述了滤波器参数设计和FIR滤波器FPGA实现等关键技术,完成了对基于FPGA的SRRC滤波器设计的仿真分析。

关 键 词:TETRA数字集群系统  平方根升余弦滤波器  基带脉冲成形  FPGA

Design of Square Root Raised Cosine Filter Based on FPGA
ZHANG Song-yi. Design of Square Root Raised Cosine Filter Based on FPGA[J]. Radio Communications Technology, 2012, 38(3): 43-46
Authors:ZHANG Song-yi
Affiliation:ZHANG Song-yi (Hebei Far East Harris Communications Co. ,Ltd. ,Shijiazhuang Hebei 050200,China)
Abstract:In order to satisfy the baseband signal pulse shaping requirements of TETRA digital trunking system,a design of square root raised cosine (SRRC) filter for use in TETRA system is proposed in this paper. First,the basic principle of pulse shaping and SRRC filter is introduced. Then,the problems of bandwidth limitation of narrowband modulation,TETRA adjacent channel interference (ACI) limitation and filter order limitation which are needed to be solved are analyzed, and the filter design, FIR filter FPGA implementation and other key technologies are discussed. At last,the simulation analysis of SRRC filter design based on FPGA is completed.
Keywords:TETRA digital trunking system  SRRC filter  baseband pulse shaping  FPGA
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