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1.
李强 《现代电子技术》2006,29(19):91-93
进入21世纪,随着集成电路的发展,SoC(System on Chip)片上系统应运而生。而作为SoC重要组成部分的嵌入式存储器,在SoC中所占的比重正逐步增加,并起着越来越重要的作用,那么嵌入式存储器与独立的存储器芯片在设计上存在着哪些差异?对此本文将以NOR型闪存为例在制造工艺的选取、衍生产品的设计、功耗与噪声、后端功能仿真、测试与修复等方面进行分析和研究。  相似文献   
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Research suggests that schizotypal personality disorder (SPD) is a part of the spectrum of schizophrenia-related illnesses. This article hypothesizes that a deficit in the representation and maintenance of context is a core cognitive disturbance in schizophrenia and that SPD individuals should demonstrate context-processing deficits. To test this hypothesis, the authors administered 3 versions of their AX-CPT task, designed to assess context processing, to 35 healthy controls and 26 individuals with DSM-IV SPD. They also administered working memory and selective attention tasks. SPD individuals displayed context representation deficits similar to those found in schizophrenia but did not show the same additional deficits in context maintenance. Context processing was strongly associated with working memory and selective attention performance in the SPD individuals. (PsycINFO Database Record (c) 2010 APA, all rights reserved)  相似文献   
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Thirty patients who had undergone either a right or left unilateral temporal lobectomy (14 RTL; 16 LTL) and 16 control participants were tested on a computerized human analogue of the Morris Water Maze. The procedure was designed to compare allocentric and egocentric spatial memory. In the allocentric condition, participants searched for a target location on the screen, guided by object cues. Between trials, participants had to walk around the screen, which disrupted egocentric memory representation. In the egocentric condition, participants remained in the same position, but the object cues were shifted between searches to prevent them from using allocentric memory. Only the RTL group was impaired on the allocentric condition, and neither the LTL nor RTL group was impaired on additional tests of spatial working memory or spatial manipulation. The results support the notion that the right anterior temporal lobe stores long-term allocentric spatial memories. (PsycINFO Database Record (c) 2010 APA, all rights reserved)  相似文献   
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The intracellular distribution of the anthracyclinic antibiotic adriamycin in living cultured cells has been investigated by confocal microscopy. In human melanoma cells (M14), adriamycin was localized inside the nuclei. When adriamycin-treated M14 cells were allowed to recover in drug-free medium, a complete efflux of the drug from the nucleus was revealed. In recovered cells, a weakly fluorescent signal was observed in the perinuclear region. When M14 cells were recovered in a medium containing colcemid, a microtubule depolymerizing agent, the drug transport from the nucleus to the cell periphery appeared to be inhibited, suggesting that the microtubule network is strongly involved in drug transport mechanisms. In multidrug-resistant (MDR) cells the intracellular location of adriamycin was shown to be noticeably different from that of the parental wild-type cells. In particular, in resistant human breast carcinoma cells (MCF-7), adriamycin appeared to be exclusively located within the cytoplasm whereas the nuclei were shown to be completely negative. When adriamycin treatment was performed in association with MDR revertants, such as Lonidamine (inhibitor of the energy metabolism) or verapamil (inhibitor of the P-glycoprotein efflux pump), a marked enhancement of the cytoplasmic signal was observed in resistant cells. Under these conditions, adriamycin appeared concentrated in the perinuclear region, but the nuclei were still negative. Confocal microscopy proved to be a very useful method for the study of the intracellular transport of fluorescent substances, such as anthracyclinic antibiotics, and for the investigation of the multidrug resistance phenomenon in tumour cells.  相似文献   
6.
A mixed mode digital/analog special purpose VLSI hardware implementation of an associative memory with neural architecture is presented. The memory concept is based on a matrix architecture with binary storage elements holding the connection weights. To enhance the processing speed analog circuit techniques are applied to implement the algorithm for the association. To keep the memory density as high as possible two design strategies are considered. First, the number of transistors per storage element is kept to a minimum. In this paper a circuit technique that uses a single 6-transistor cell for weight storage and analog signal processing is proposed. Second, the device precision has been chosen to a moderate level to save area as much as possible. Since device mismatch limits the performance of analog circuits, the impact of device precision on the circuit performance is explicitly discussed. It is shown that the device precision limits the number of rows activated in parallel. Since the input vector as well as the output vector are considered to be sparsely coded it is concluded, that even for large matrices the proposed circuit technique is appropriate and ultra large scale integration with a large number of connection weights is feasible.  相似文献   
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In this paper we propose a novel built-in self-test (BIST) design for embedded SRAM cores. Our contribution includes a compact and efficient BIST circuit with diagnosis support and an automatic diagnostic system. The diagnosis module of our BIST circuit can capture the error syndromes as well as fault locations for the purposes of repair and fault/failure analysis. In addition, our design provides programmability for custom March algorithms with lower hardware cost. The combination of the on-line programming mode and diagnostic system dramatically reduces the effort in design debugging and yield enhancement. We have designed and implemented test chips with our BIST design. Experimental results show that the area overhead of the proposed BIST design is only 2.4% for a 128 KB SRAM, and 0.65% for a 2 MB one.  相似文献   
8.
In this paper a set of one-dimensional simulations of a-Si:H p–i–n junctions under different illumination conditions and with different intrinsic layer are presented. The simulation program ASCA permits the analysis of the internal electrical behaviour of the cell allowing a comparison among the different internal configurations determined by a change in the input set. Results about the internal electric configuration will be presented and discussed outlining their influence on the current tension characteristic curve. Considerations about the drift–diffusion and the generation–recombination balance distributions, outlined by the simulation, can be used to explain the correlation between the basic device output, the i-layer characteristics (thickness and DOS), the incident radiation intensity and photon energy.  相似文献   
9.
Aiming at preparation of shape memory alloys (SMAs), we explored the SHS of Cu1 − x Zn1 − y Al1 − z alloys (0.29 < x < 0.30, 0.74 < y < 0.75, and 0.83 < z < 0.96). The most pronounced shape memory effect was exhibited by the alloys of the following compositions (wt %): (1) Cu(70.6)Zn(25.4)Al(4.0), (2) Cu(70.1)Zn(25.9)Al(4.0), and (3) Cu(69.9)Zn(26.1)Al(4.0). The effect of process parameters on the synthesis of CuZnAl alloys was studied by XRD, optical microscopy, and scanning electron microscopy (SEM). The grain size of CuZnAl was found to depend on the relative amount of the primary CuZn and AlZn phases. Changes in the transformation temperature and heat of transformation are discussed in terms of ignition intensity and compaction. Mechanism of the process depends on the level of the temperature attained relative to the melting point of components. At the melting point of AlZn, the process is controlled by the solid-state diffusion of AlZn into a product layer. The ignition temperature for this system depends on the temperature of the austenite-martensite transformation in CuZnAl alloys. The composition and structure of the products was found to markedly depend on process parameters. The SHS technique has been successfully used to prepare a variety of SMAs.   相似文献   
10.
We report on a single‐layer organic memory device made of poly(N‐vinylcarbazole) embedded between an Al electrode and ITO modified with Ag nanodots (Ag‐NDs). Devices exhibit high ON/OFF switching ratios of 104. This level of performance could be achieved by modifying the ITO electrodes with some Ag‐NDs that act as trapping sites, reducing the current in the OFF state. Temperature dependence of the electrical characteristics suggest that the current of the low‐resistance state can be attributed to Schottky charge tunnelling through low‐resistance pathways of Al particles in the polymer layer and that the high‐resistance state can be controlled by charge trapping by the Al particles and Ag‐NDs.  相似文献   
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