亲子乐园空调送风方式的数值模拟研究

大型综合室内亲子乐园属于高大空间,设有游乐设施和游戏的特殊性使得对空间的舒适性要求一致,但是送风气流遇阻严重,室内存在较多气流死角,影响室内空气质量和儿童健康。因此其空调设计不仅需要考虑温度、风速的空间均匀度,还要考虑各点的空气龄和PMV-PPD指标。以天津某亲子乐园为研究对象,利用scSTREAM软件对适用于该房间的辐射供冷加新风、置换通风、混合通风三种空调方式的送风效果进行数值模拟分析,从流场的均匀性、人员的热舒适性等方面对模拟结果进行探讨,研究结果表明辐射供冷加新风方式的空间均匀性和PMV指标最佳,混合通风方式的空气龄最小。     

基于射频技术的无刷同步电机励磁电流的检测

无刷同步电机的励磁系统对励磁电流的测量是制约该励磁方式发展的一大障碍。设计了一个射频系统可以用来解决同步电机的励磁电流的测量问题。该系统可以方便地检测到同步电机励磁机的整流二极管的工作状态并且可以动态地显示励磁电流，极大地方便了运行人员做出判断，而且结构简单、方便实用。     

变频器调速装置节能浅析

1概述 近十多年来,随着电力电子技术、微电子技术及现代控制理论的发展,变频调速技术已经广泛地用于交流电动机的速度控制,其最主要的特点是具有高效率的驱动性能及良好的控制特性.它是一种高新技术电力节能装置,它通过改变（降低）电源工作频率,来降低动力设备（电机）的转速,减少设备的输出功率,达到输出功率与工作负荷的最佳匹配,实现节能目的,有效地提高了经济效益和产品质量.几乎可以说,有电动机的地方就有变频器,在一切需要进行速度控制的场合,变频器以其操作方便、体积小、控制性能高而获得广泛应用.     

High-performance and power-efficient CMOS comparators

Several design techniques for high-performance and power-efficient CMOS comparators are proposed. First, the comparator is based on the priority-encoding (PE) algorithm, and the dynamic circuit technique developed specifically for the priority encoder can be applied. Second, the PE function and the subsequent logic functions are merged and efficiently realized in the multiple output domino logic (MODL) to result in a shortened logic depth. The circuit in MODL CMOS is also compact and power efficient because few transistors are needed. Third, the multilevel look-ahead technique is used to shorten the path of priority-token propagation. Finally, the circuit is realized with a latch-based two-stage pipelined structure, and the comparison function is partitioned into two parts, with each part executed in each half of the clock cycle in a delay-balanced manner. Post-layout simulation results show that a 64-b comparator designed with the proposed techniques in a 3-V 0.6-/spl mu/m CMOS technology is 16% faster, 50% smaller, and 79% more power efficient as compared with the all-n-transistor comparator, which is the fastest among the conventional comparators. Measurement results of the test chip conform with simulation results and prove the feasibility of the proposed techniques.     

基于压电陶瓷动态信息的结构裂纹识别方法

利用压电陶瓷的动态特性和压电系统的动态信息,对铝梁的裂纹损伤进行了分析研究。随着梁裂纹尺寸的增加,压电陶瓷片的导钠幅值下降,且系统固有频率减小。利用导钠幅值的变化和系统的动态信息,可以对裂纹的位置和尺寸大小进行识别。实验证明该方法的有效性。     

A 1.5-V 45-mW direct-conversion WCDMA receiver IC in 0.13-/spl mu/m CMOS

A 2-GHz direct-conversion receiver for wide-band code division multiple access (WCDMA) is presented. It includes two low-noise amplifiers (LNAs), an I/Q demodulator, and two sixth-order baseband channel select filters with programmable gain. Quadrature local oscillator (LO) signals are generated on chip in a frequency divider flip-flop. An external interstage filter between the LNAs rejects transmitter leakage to relax demodulator linearity requirements. A low-voltage demodulator topology improves linearity as well as demodulator output pole accuracy. The active-RC baseband filter uses a programmable servo loop for offset compensation and provides an adjacent channel rejection of 39 dB. Programmable gain over 71-dB range in 1-dB steps is merged with the filter to maximize dynamic range. An automatic on-chip frequency calibration scheme provides better than 1.5% corner frequency accuracy. The receiver is integrated in a 0.13-/spl mu/m CMOS process with metal-insulator-metal (MIM) capacitors. Measured receiver performance includes a 6.5-dB noise figure, IIP2 of +27 dBm, and IIP3 of -8.6 dBm. Power consumption is 45 mW.     

纤维在沥青混合料中的应用研究

选用工程中常用的几种纤维,结合工程应用要求,试验分析了纤维的吸湿性、耐热性,并通过网篮析漏试验、动态剪切试验和沉锥试验,讨论了纤维对沥青的稳定和吸附作用,以及纤维对沥青混合料“加筋”效果和作用机理。研究表明有的纤维“吸附、稳定”性能好,而有的纤维“加筋、桥接”效果好,在应用纤维时,应根据纤维的主要特点以及沥青混合料的使用要求来选用。     

番禺30-1砂岩强水驱气藏储层非均质性研究

针对垂向非均质性严重且边底水能量强的番禺30-1气田面临的潜在开发问题，通过岩心分析及测井二次解释，对其夹层特征及储层非均质性等进行了研究，划分出19个流动单元并定量描述了各流动单元的特征参数，建立了该气田的精细地质模型。综合评价表明，新建的地质模型具有较高的精度，为该气藏合理开发提供了坚实的地质基础。     

Analysis and architecture design of variable block-size motion estimation for H.264/AVC

Variable block-size motion estimation (VBSME) has become an important video coding technique, but it increases the difficulty of hardware design. In this paper, we use inter-/intra-level classification and various data flows to analyze the impact of supporting VBSME in different hardware architectures. Furthermore, we propose two hardware architectures that can support traditional fixed block-size motion estimation as well as VBSME with less chip area overhead compared to previous approaches. By broadcasting reference pixel rows and propagating partial sums of absolute differences (SADs), the first design has the fewer reference pixel registers and a shorter critical path. The second design utilizes a two-dimensional distortion array and one adder tree with the reference buffer that can maximize the data reuse between successive searching candidates. The first design is suitable for low resolution or a small search range, and the second design has advantages of supporting a high degree of parallelism and VBSME. Finally, we propose an eight-parallel SAD tree with a shared reference buffer for H.264/AVC integer motion estimation (IME). Its processing ability is eight times of the single SAD tree, but the reference buffer size is only doubled. Moreover, the most critical issue of H.264 IME, which is huge memory bandwidth, is overcome. We are able to save 99.9% off-chip memory bandwidth and 99.22% on-chip memory bandwidth. We demonstrate a 720-p, 30-fps solution at 108 MHz with 330.2k gate count and 208k bits on-chip memory.