Analysis and architecture design of variable block-size motion estimation for H.264/AVC

Variable block-size motion estimation (VBSME) has become an important video coding technique, but it increases the difficulty of hardware design. In this paper, we use inter-/intra-level classification and various data flows to analyze the impact of supporting VBSME in different hardware architectures. Furthermore, we propose two hardware architectures that can support traditional fixed block-size motion estimation as well as VBSME with less chip area overhead compared to previous approaches. By broadcasting reference pixel rows and propagating partial sums of absolute differences (SADs), the first design has the fewer reference pixel registers and a shorter critical path. The second design utilizes a two-dimensional distortion array and one adder tree with the reference buffer that can maximize the data reuse between successive searching candidates. The first design is suitable for low resolution or a small search range, and the second design has advantages of supporting a high degree of parallelism and VBSME. Finally, we propose an eight-parallel SAD tree with a shared reference buffer for H.264/AVC integer motion estimation (IME). Its processing ability is eight times of the single SAD tree, but the reference buffer size is only doubled. Moreover, the most critical issue of H.264 IME, which is huge memory bandwidth, is overcome. We are able to save 99.9% off-chip memory bandwidth and 99.22% on-chip memory bandwidth. We demonstrate a 720-p, 30-fps solution at 108 MHz with 330.2k gate count and 208k bits on-chip memory.     

Defocusing image to pattern contact holes using attenuated phase shift masks

The patterning of contact holes by selecting out-of-focus image plane (defocus) using attenuated phase shift masks (APSM) has been studied. Defocus is found to enhance the image modulation at low partial coherence for contact holes with negative local average of mask function. Semi-dense holes up to 130 nm in 8% APSM have been printed by 0.5 μm defocus at a partial coherence of 0.31 using KrF scanner with highest numerical aperture of 0.68. However, these holes were closed with in-focus imaging. Defocus is also found to be beneficial for patterning the pitches that have extensive side lobes with in-focus imaging.     

The Synthesis of Sulfated Titanium Oxide Nanotubes

TiO₂ nanotubes can be prepared in gram quantities by treating anatase TiO₂ powder with concentrated NaOH solution. These TiO₂ nanotubes acquired strong acidity after being impregnated with sulfuric acid solution and calcined at 300 °C. The anatase TiO₂ powder used to prepare the nanotube did not catalyze the esterification between cyclohexanol and acetic acid, while sulfated TiO₂ nanotubes were very reactive toward the esterification reaction.     

Frequency domain identification of Wiener models

This paper proposes a frequency domain algorithm for Wiener model identifications based on exploring the fundamental frequency and harmonics generated by the unknown nonlinearity. The convergence of the algorithm is established in the presence of white noise. No a priori knowledge of the structure of the nonlinearity is required and the linear part can be nonparametric.     

Optimum power-saving method for power MOSFET width of DC/DC converters

An optimum power metal-oxide-semiconductor field effect transistor (MOSFET) width technique is proposed for enhancing the efficiency characteristics of switching DC-DC converters. By implementing a one-cycle buck DC-DC converter, it is demonstrated that the dynamic power MOSFET width controlling technique has a much improved power reduction whether the load current is light or heavy. The maximum efficiency of the buck converter is ~92% with a 3% efficiency improvement for the heavy load condition. The efficiency is further improved by ~16% for the light load condition as a result of the power reduction from the large power MOSFET transistors. Also proposed is a new error-correction loop circuit to enable a better load regulation than that of previous designs. Compared with the adaptive gate driver voltage technique, the optimum power MOSFET width can achieve a significant improvement in power saving. It is also superior to the low-voltage-swing MOSFET gate drive technique for switching DC-DC converters     

Intravaginal Controlled Administration of Flurogestone Acetate: (III) Development of Rate-Control Vaginal Devices

A Rate-Control vaginal device was developed which overcomes the low bioavailability and unpredictable Q - t^1/2 type release and absorption rate profiles of flurogestone acetate delivered by the currently marketed Syncro-Mate pessary.

The in vitro release and vaginal absorption profiles from the Rate-Control vaginal device were run simultaneously, a linear Q - t relationship was obtained with a significant improvement in bioavailability. A mathematical model was developed to correlate the in vitro drug release and the vaginal absorption profiles of flurogestone acetate from the vaginal devices.

The design, development and the simultaneous release and absorption profiles of flurogestone acetate from this new vaginal device were outlined and discussed.     

Task Planning For A Mobile Robot In An Indoor Environment Using Object-oriented Domain Information

For a mobile robot to be practical, it needs to navigate in dynamically changing environments and manipulate objects in the environment with operating ease. The main challenges to satisfying these requirements in mobile robot research include the collection of robot environment information, storage and organization of this information, and fast task planning based on available information. Conventional approaches to these problems are far from satisfactory due to their requirement of high computation time. In this paper, we specifically address the problems of storage and organization of the environment information and fast task planning in the area of robotic research. We propose an special object-oriented data model (OODM) for information storage and management in order to solve the first problem. This model explicitly represents domain knowledge and abstracts a global perspective about the robot's dynamically changing environment. To solve the second problem, we introduce a fast task planning algorithm that fully uses domain knowledge related to robot applications and to the given environment. Our OODM based task planning method presents a general frame work and representation, into which domain specific information, domain decomposition methods and specific path planners can be tailored for different task planning problems. This method unifies and integrates the salient features from various areas such as database, artificial intelligence, and robot path planning, thus increasing the planning speed significantly     

A single-chip 12.7 Mchips/s digital IF BPSK direct sequencespread-spectrum transceiver in 1.2 μm CMOS

This paper describes a fully integrated digital-spread spectrum transceiver chip fabricated through MOSIS in 1.2 μm CMOS. It includes a baseband spread spectrum transmitter and a coherent intermediate frequency (IF) receiver consisting of a Costas loop, an acquisition loop for the pseudo-noise (PN) sequence, and a clock recovery loop with a 406.4 MHz onchip numerically controlled oscillator (NCO). The transceiver is capable of operating at a maximum IF sampling rate of 50.8 MS/s and a maximum chip rate of 12.7 R Mchips/s (Mcps) with selectable data rates of 100, 200, 400, and 800 kbps. At the maximum operating speed of 50.8 R MS/s, it dissipates 1.1 W. In an additive white Gaussian noise channel the IF receiver achieves a receiver output SNR within 1 dB of theory and can acquire code with a wide range of input SNR from -17 dB to over 30 dB. The transceiver chip has been interfaced to an RF up/down converter to demonstrate a wireless voice/data/video link operating in the 902-928 MHz band