Macromodeling of nonlinear digital I/O drivers

In this paper, a modeling technique using spline functions with finite time difference approximation is discussed for modeling moderately nonlinear digital input/output (I/O) drivers. This method takes into account both the static and the dynamic memory characteristics of the driver during modeling. Spline function with finite time difference approximation includes the previous time instances of the driver output voltage/current to capture the output dynamic characteristics of digital drivers accurately. In this paper, the speed and the accuracy of the proposed method is analyzed and compared with the radial basis function (RBF) modeling technique, for modeling different test cases. For power supply noise analysis, the proposed method has been extended to multiple ports by taking the previous time instances of the power supply voltage/current into account. The method discussed can be used to capture sensitive effects like simultaneous switching noise (SSN) and cross talk accurately when multiple drivers are switching simultaneously. A comparison study between the presented method and the transistor level driver models indicate a computational speed-up in the range of 10-40 with an error of less than 5%. For highly nonlinear drivers, a method based on recurrent artificial neural networks (RNN) is discussed.     

Macromodeling of nonlinear transistor-level receiver circuits

In this paper, a modeling methodology for macromodeling transistor-level receiver circuits has been presented. A few receiver modeling techniques have been proposed in the past, but these modeling techniques only address the loading effect of the receiver circuits, i.e., the input characteristics of the receivers. In this paper, a modeling methodology that addresses both the loading effect as well as the output characteristics of the receiver has been proposed. This modeling technique is simple, accurate, and has huge computational speed-up over transistor-level receiver circuits. To model the input characteristics of the receiver, spline function with finite time difference (SFWFTD) and recurrent neural network (RNN) modeling methods have been used. The output characteristics of the receiver are modeled using a combination of receiver static characteristics and a delay element that takes into account the timing delay of the receiver. The accuracy of the modeling approach has been tested on some test cases and results show good accuracy and substantial speed-up compare to transistor-level receiver circuits. The proposed modeling technique has been extended to multiple ports to estimate sensitive effects like simultaneous switching noise (SSN) when multiple receivers are switching.