47 GHz VCO with low phase noise fabricated in a SiGe bipolarproduction technology

A low-phase-noise and low-cost millimeter-wave voltage-controlled oscillator (VCO) has been fully integrated in commercial SiGe bipolar technologies. By varying the bias voltage of the on-chip varactor, the frequency can be continuously tuned from 43.6 to 47.3 GHz. In this frequency range, single-sideband phase noise between -103 and -108.5 dBc/Hz at 1 MHz offset frequency was measured. The output voltage swing of the differential circuit is about 0.85 V_p-p for the single-ended and 1.7 V_p-p for the differential output     

A 10-gb/s CMOS clock and data recovery circuit with an analog phase interpolator

This paper presents a 10-Gb/s clock and data recovery (CDR) circuit for use in multichannel applications. The module aligns the phase of a plesiochronous system clock to the incoming data by use of phase interpolation. Thus, coupling between voltage-controlled oscillators (VCOs) in adjacent channels can be avoided. The controller for the phase interpolator is realized with analog circuitry to overcome the speed and phase resolution limitations of digital implementations. Fabricated in a 0.11-/spl mu/m CMOS technology the module has a size of 0.25/spl times/1.4 mm/sup 2/. The power consumption is 220 mW from a supply voltage of 1.5 V. The CDR exceeds the SDH/SONET jitter tolerance specifications with a pseudo random bit sequence of length 2/sup 23/-1 and a bit-error rate threshold of 10/sup -12/. The re-timed and demultiplexed data has an rms jitter of 3.2 ps at a data rate of 2.7 Gb/s.