排序方式: 共有9条查询结果,搜索用时 15 毫秒
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The design, fabrication, and electrical characteristics of the 4H-SiC JBS diode with a breakdown voltage higher than 10 kV are presented. 60 floating guard rings have been used in the fabrication. Numerical simulations have been performed to select the doping level and thickness of the drift layer and the effectiveness of the edge termination technique. The n-type epilayer is 100 μm in thickness with a doping of 6 × 10^14 cm^-3. The on-state voltage was 2.7 V at JF = 13 A/cm^2. 相似文献
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介绍了高压空间调制结终端扩展(SM-JTE)结构及其优势。结合实际的MOSFET工艺和已有的理论模型,定义了全新的4H-SiC器件TCAD仿真模型参数。首次提出了确定SM-JTE最优长度的方法。基于SM-JTE结构的4H-SiC器件具有优良的击穿特性。SM-JTE结构的长度为230 μm时,SM-JTE的击穿电压可以达到16 kV。针对界面电荷对击穿特性的影响进行了系统仿真研究。仿真结果表明,正界面电荷相比负界面电荷对击穿电压的影响更大,且界面态电荷会引起击穿电压明显下降。该SM-JTE结构可以采用更短的结终端,在同样尺寸的芯片上能制作更多的器件,从而提高生产效率,降低器件成本。 相似文献
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The design, fabrication, and electrical characteristics of a 4H-SiC PiN diode with breakdown voltage higher than 17 kV are presented. The three-zone JTE has been used in the fabrication. Numerical simulations have been performed to optimize the parameters of the edge termination technique. The epilayer properties of the N-type are 175 μm with a doping of 2×1014cm-3. With the three-zone JTE, a typical breakdown voltage of 17 kV has been achieved. 相似文献
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作为测试小管芯,所研制的小栅宽(0.5 mm)L波段SiC SIT器件,台面和栅凹槽线宽分别为1.0 μm和1.5 μm,源间距2.5 μm,采用凹栅结构、Al注入形成PN结等优化手段,提高了器件的击穿特性和微波特性.0.5 mm栅宽SiC SIT器件,输出功率通过负载牵引系统进行测试,在1.2 GHz CW、50 V... 相似文献
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通过器件模拟仿真软件Sentauras和高分辨率透射电子显微镜(High-Resolution Transmission Electron Microscopy ,简称HRTEM)研究了4H-SiC结势垒肖特基二极管(Junction Barrier Schottky ,简称JBS)在反向浪涌电压应力作用下的失效机理;进而重点研究了结终端扩展区(Junction Termination Extension ,简称JTE)的长度、深度和掺杂浓度对该器件反向浪涌峰值电压(Maximum Surge Peak Reverse Voltage ,简称VRSM)的影响,并结合JBS的基本结构对其进行优化设计;最后,流片测试显示优化设计的4H-SiC结势垒肖特基二极管的VRSM值约为1450V,比原器件提升了20%左右。 相似文献
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