CMOS digital duty cycle correction circuit for multi-phase clock

A digital duty cycle correction circuit with a fixed-delay rising-edge output is proposed for use in applications with the multi-phase clock and the standby mode. Two integrators are used in the duty cycle detector to eliminate the effect of reference voltage variations. The output duty cycle is adjusted to 50/spl plusmn/0.25% throughout the input duty cycle range from 20% to 80% at the frequency of 1.25 GHz. 0.18 /spl mu/m CMOS technology is used in this work.     

Computing the Average Symbol Error Probability of the MPSK System Having Quadrature Error

When quadrature error exists, the shape of the M‐ary phase shift keying (MPSK) signal constellation becomes skewed‐elliptic. Each MPSK symbol takes on a different symbol error probability (SEP) value. The analytical results presented thus far have been derived from studies which examined the SEP problem assuming that the SEP of each MPSK symbol is equally likely; therefore, those results should not be treated as offering a complete solution. In this letter, we present a new and more complete solution to the SEP problem of MPSK by relaxing the above assumption and finding the expressions for the average as well as individual SEP in the presence of quadrature error.     

High-Performance Al–Sn–Zn–In–O Thin-Film Transistors: Impact of Passivation Layer on Device Stability

We fabricated high-performance thin-film transistors (TFTs) with an amorphous-Al–Sn–Zn–In–O (a-AT-ZIO) channel deposited by cosputtering using a dual Al–Zn–O and In–Sn–O target. The fabricated AT-ZIO TFTs, which feature a bottom-gate and bottom-contact configuration, exhibited a high field-effect mobility of 31.9 $ hbox{cm}^{2}/hbox{V}cdothbox{s}$, an excellent subthreshold gate swing of 0.07 V/decade, and a high $I_{{rm on}/{rm off}}$ ratio of $≫hbox{10}^{9}$, even below the process temperature of 250 $^{circ}hbox{C}$. In addition, we demonstrated that the temperature and bias-induced stability of the bottom-gate TFT structure can significantly be improved by adopting a suitable passivation layer of atomic-layer-deposition-derived $hbox{Al}_{2} hbox{O}_{3}$ thin film.      

基于液晶偏振开关与液晶屏的三维集成成像

本文提出一种利用液晶显示屏(LCD)和液晶(LC)偏振开关组成的三维集成成像系统，并给出实验演示结果，其目的是为了增强可视性，例如集成成像的视角和图像深度。为了增大视角，使用了液晶偏振开关控制的单透镜和正交偏振片。为了增大图像的深度，采用了双折射材料或带有偏振开关的偏振选择性反射镜。由于我们提出的所有方法都不使用机械结构，因此有助于实现一个实用的基于集成成像的3D显示系统。     

A formation of cobalt silicide on silicon field emitter arrays byelectrical stress

A novel process utilizing electrical stress is proposed for the formation of Co silicide on single crystal silicon (c-Si) FEAs to improve the field emission characteristics. Co silicide FEAs formed by electrical stress (ES) exhibited a significant improvement in turn-on voltage and emission current compared with c-Si FEAs. The improvement mainly comes from the lower effective work function of Co silicide and less blunting of tips during silicidation by electrical stress in an ultra high vacuum (UHV) environment less than 10^-8 torr     

Environmental effects on the electrical behavior of pentacene thin-film transistors with a poly(methyl methacrylate) gate insulator

The electrical properties of top-contact pentacene thin-film transistors (TFTs) with a poly(methyl methacrylate) (PMMA) gate dielectric were analyzed in air and vacuum environments. Compared to the vacuum case, the pentacene TFT in air exhibited lower drain currents and more pronounced shifts in the threshold voltage upon reversal of the gate voltage sweep direction, together with a decrease in the field-effect mobility. These characteristic variations were explained in terms of two distinctive actions of polar H₂O molecules in pentacene TFT. H₂O molecules were suggested to diffuse under the source and drain contacts and interrupt the charge injection into the pentacene film, whereas those that permeate at the pentacene/PMMA interface retard hole depletion in and around the TFT channel. The diffusion process was much slower than the permeation process. The degraded TFT characteristics in air could be recovered mostly by storing the device under vacuum, which suggests that the air instability of TFTs is due mainly to the physical adsorption of H₂O molecules within the pentacene film.     

Dual-wavelength cascaded Raman fibre laser

Dual-wavelength lasing at 1480 and 1500 nm has been demonstrated from a cascaded Raman fibre laser with a WDM coupler and two pairs of Bragg gratings. Intensity-adjustable, wavelength-tunable laser operation was achieved by tensile stress wavelength tuning of the gratings     

High‐Performance Sodium‐Ion Hybrid Supercapacitor Based on Nb2O5@Carbon Core–Shell Nanoparticles and Reduced Graphene Oxide Nanocomposites

Sodium‐ion hybrid supercapacitors (Na‐HSCs) have potential for mid‐ to large‐scale energy storage applications because of their high energy/power densities, long cycle life, and the low cost of sodium. However, one of the obstacles to developing Na‐HSCs is the imbalance of kinetics from different charge storage mechanisms between the sluggish faradaic anode and the rapid non‐faradaic capacitive cathode. Thus, to develop high‐power Na‐HSC anode materials, this paper presents the facile synthesis of nanocomposites comprising Nb₂O₅@Carbon core–shell nanoparticles (Nb₂O₅@C NPs) and reduced graphene oxide (rGO), and an analysis of their electrochemical performance with respect to various weight ratios of Nb₂O₅@C NPs to rGO (e.g., Nb₂O₅@C, Nb₂O₅@C/rGO‐70, ‐50, and ‐30). In a Na half‐cell configuration, the Nb₂O₅@C/rGO‐50 shows highly reversible capacity of ≈285 mA h g^?1 at 0.025 A g^?1 in the potential range of 0.01–3.0 V (vs Na/Na⁺). In addition, the Na‐HSC using the Nb₂O₅@C/rGO‐50 anode and activated carbon (MSP‐20) cathode delivers high energy/power densities (≈76 W h kg^?1 and ≈20 800 W kg^?1) with a stable cycle life in the potential range of 1.0–4.3 V. The energy and power densities of the Na‐HSC developed in this study are higher than those of similar Li‐ and Na‐HSCs previously reported.     

Reliable Piezoelectricity in Bilayer WSe2 for Piezoelectric Nanogenerators

Recently, piezoelectricity has been observed in 2D atomically thin materials, such as hexagonal‐boron nitride, graphene, and transition metal dichalcogenides (TMDs). Specifically, exfoliated monolayer MoS₂ exhibits a high piezoelectricity that is comparable to that of traditional piezoelectric materials. However, monolayer TMD materials are not regarded as suitable for actual piezoelectric devices due to their insufficient mechanical durability for sustained operation while Bernal‐stacked bilayer TMD materials lose noncentrosymmetry and consequently piezoelectricity. Here, it is shown that WSe₂ bilayers fabricated via turbostratic stacking have reliable piezoelectric properties that cannot be obtained from a mechanically exfoliated WSe₂ bilayer with Bernal stacking. Turbostratic stacking refers to the transfer of each chemical vapor deposition (CVD)‐grown WSe₂ monolayer to allow for an increase in degrees of freedom in the bilayer symmetry, leading to noncentrosymmetry in the bilayers. In contrast, CVD‐grown WSe₂ bilayers exhibit very weak piezoelectricity because of the energetics and crystallographic orientation. The flexible piezoelectric WSe₂ bilayers exhibit a prominent mechanical durability of up to 0.95% of strain as well as reliable energy harvesting performance, which is adequate to drive a small liquid crystal display without external energy sources, in contrast to monolayer WSe₂ for which the device performance becomes degraded above a strain of 0.63%.