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41.
42.
Electromagnetic field distribution in the vertical metal organic chemical vapour deposition (MOCVD) reactor is simulated by using the finite element method (FEM). The effects of alternating current frequency, intensity, coil turn number and the distance between the coil turns on the distribution of the Joule heat are analysed separately, and their relations to the value of Joule heat are also investigated. The temperature distribution on the susceptor is also obtained. It is observed that the results of the simulation are in good agreement with previous measurements.  相似文献   
43.
曹艳荣  马晓华  郝跃  胡世刚 《中国物理 B》2010,19(4):47307-047307
This paper studies the effect of drain bias on ultra-short p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET) degradation during negative bias temperature (NBT) stress. When a relatively large gate voltage is applied, the degradation magnitude is much more than the drain voltage which is the same as the gate voltage supplied, and the time exponent gets larger than that of the NBT instability (NBTI). With decreasing drain voltage, the degradation magnitude and the time exponent all get smaller. At some values of the drain voltage, the degradation magnitude is even smaller than that of NBTI, and when the drain voltage gets small enough, the exhibition of degradation becomes very similar to the NBTI degradation. When a relatively large drain voltage is applied, with decreasing gate voltage, the degradation magnitude gets smaller. However, the time exponent becomes larger. With the help of electric field simulation, this paper concludes that the degradation magnitude is determined by the vertical electric field of the oxide, the amount of hot holes generated by the strong channel lateral electric field at the gate/drain overlap region, and the time exponent is mainly controlled by localized damage caused by the lateral electric field of the oxide in the gate/drain overlap region where hot carriers are produced.  相似文献   
44.
N and P-channel groove-gate MOSFETs based on a self-aligned CMOS process have been fabricated and characterized. For the devices with channel length of 140nm, the measured drain induced barrier lowering (DIBL) was 66mV/V for n-MOSFETs and 82mV/V for p-MOSFETs. The substrate current of a groove-gate n-MOSFET was 150 times less than that of a conventional planar n-MOSFET. These results demonstrate that groove-gate MOSFETs have excellent capabilities in suppressing short-channel effects. It is worth emphasizing that our groove-gate MOSFET devices are fabricated by using a simple process flow, with the potential of fabricating devices in the sub-100nm range.  相似文献   
45.
Taking the actual operating condition of complementary metal oxide semiconductor (CMOS) circuit into account, conventional direct current (DC) stress study on negative bias temperature instability (NBTI) neglects the detrapping of oxide positive charges and the recovery of interface states under the `low' state of p-channel metal oxide semiconductor field effect transistors (MOSFETs) inverter operation. In this paper we have studied the degradation and recovery of NBTI under alternating stress, and presented a possible recovery mechanism. The three stages of recovery mechanism under positive bias are fast recovery, slow recovery and recovery saturation.  相似文献   
46.
于春利  杨林安  郝跃 《中国物理》2004,13(7):1104-1109
A novel model for lightly-doped-drain (LDD) MOSFETs is proposed, which utilizes the empirical hyperbolic tangent function to describe the I-V characteristics. The model includes the strong inversion and subthreshold mechanism, and shows a good prediction for submicron LDD MOSFET. Moreover, the model requires low computation time consumption and is suitable for design of MOSFETs devices and circuits.  相似文献   
47.
This paper studies systematically the drain current collapse in AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOS-HEMTs) by applying pulsed stress to the device. Low-temperature layer of Al2O3 ultrathin film used as both gate dielectric and surface passivation layer was deposited by atomic layer deposition (ALD). For HEMT, gate turn-on pulses induced large current collapse. However, for MOS-HEMT, no significant current collapse was found in the gate turn-on pulsing mode with different pulse widths, indicating the good passivation effect of ALD Al2O3. A small increase in Id in the drain pulsing mode is due to the relieving of self-heating effect. The comparison of synchronously dynamic pulsed Id - Vds characteristics of HEMT and MOS-HEMT further demonstrated the good passivation effect of ALD Al2O3.  相似文献   
48.
任泽阳  张金风  张进成  许晟瑞  张春福  全汝岱  郝跃 《物理学报》2017,66(20):208101-208101
基于微波等离子体化学气相淀积生长的单晶金刚石制作了栅长为2μm的耗尽型氢终端金刚石场效应晶体管,并对器件特性进行了分析.器件的饱和漏电流在栅压为-6 V时达到了96 mA/mm,但是在-6 V时栅泄漏电流过大.在-3.5 V的安全工作栅压下,饱和漏电流达到了77 mA/mm.在器件的饱和区,宽5.9 V的栅电压范围内,跨导随着栅电压的增加而近线性增大到30 mS/mm.通过对器件导通电阻和电容-电压特性的分析,氢终端单晶金刚石的二维空穴气浓度达到了1.99×10~(13)cm~(-2),并且迁移率和载流子浓度均随着栅压向正偏方向的移动而逐渐增大.分析认为,沟道中高密度的载流子、大的栅电容以及迁移率的逐渐增加是引起跨导在很大的栅压范围内近线性增加的原因.  相似文献   
49.
高场应力及栅应力下AlGaN/GaN HEMT器件退化研究   总被引:1,自引:0,他引:1       下载免费PDF全文
采用不同的高场应力和栅应力对AlGaN/GaN HEMT器件进行直流应力测试,实验发现:应力后器件主要参数如饱和漏电流,跨导峰值和阈值电压等均发生了明显退化,而且这些退化还是可以完全恢复的;高场应力下,器件特性的退化随高场应力偏置电压的增加和应力时间的累积而增大;对于不同的栅应力,相对来说,脉冲栅应力和开态栅应力下器件特性的退化比关态栅应力下的退化大.对不同应力前后器件饱和漏电流,跨导峰值和阈值电压的分析表明,AlGaN势垒层陷阱俘获沟道热电子以及栅极电子在栅漏间电场的作用下填充虚栅中的表面态是这些不同应 关键词: AlGaN/GaN HEMT器件 表面态(虚栅) 势垒层陷阱 应力  相似文献   
50.
冯倩  龚欣  张晓菊  郝跃 《中国物理》2005,14(10):2133-2136
Both the electrical and optical properties are studied of the GaN:Si films with carrier concentrations ranging from 10^17cm^-3 to 10^19cm^-3.rhe results indicate that the increase in slope of carrier concentration starts to slow down when the flow rate of SiH4 is larger than 6.38μmol/min, which is attributed to the amphoteric character of Si. At the same time, the photoluminescence results show that the FWHM of UV is widened,which can be interpreted quantitatively with a semi-classic model. Furthermore, the intensity ratio between the yellow and the UV luminescences reduces monotonically with Si dopants increasing.  相似文献   
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