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41.
介绍了循环伏安法的产生背景、原理。应用该技术可以快速、方便地对润滑油中抗氧剂、总酸(碱)值进行测定,并且可以对不同厂家润滑油的抗氧剂包进行区别。该技术还可以有效地评价润滑油的使用寿命和设备工作状况。 相似文献
42.
43.
加氢反应器制造技术的新进展 总被引:2,自引:1,他引:1
王玉台 《石油化工设备技术》2006,27(5):8-9,13
随着加氢装置的大型化,对加氢反应器的设计、主体材质的选用及制造均提出了新的、更高的要求。文章较全面地介绍了国内外加氢反应器的设计准则、主体材质(抗氢钢)和制造技术等方面的新进展。 相似文献
44.
北部湾盆地福山凹陷CO2气成因探讨 总被引:2,自引:1,他引:1
北部湾盆地福山凹陷油气钻探中发现了高含CO2气的天然气气藏。对CO2气稳定碳同位素、伴生稀有气体氦和氩同位素进行了分析研究,结果显示,福山凹陷CO2气稳定碳同位素偏重,(13CCO2为-5.01~-10.08‰,绝大多数样品大于-7.0‰,为无机成因CO2气特征;伴生稀有气体氦同位素3He/4He值为(4.74~5.03)×10-6,R/Ra值为3.38~3.59;伴生稀有气体氩同位素40Ar/36Ar值为1881~2190,也显示出幔源或壳幔混合CO2气的特征。综合判定认为,福山凹陷CO2为壳幔混合成因。始新统流沙港组岩浆岩体分布特征与CO2气藏分布范围基本一致,也表明幔源-岩浆可能是福山凹陷CO2气的主要来源。与南海北部边缘盆地其它地区如珠江口盆地西部、琼东南盆地东部CO2气成因一致,都为幔源-岩浆来源,或壳幔混合来源。 相似文献
45.
含硫化氢气井钻井过程中的腐蚀因素与防护研究 总被引:1,自引:0,他引:1
在含硫气井的钻井过程中对于HRC大于22的钻具钢材除了腐蚀疲劳之外,在pH值小于9的环境中会发生硫化物应力腐蚀破裂,这种破坏比腐蚀疲劳更突然、更快,使钻杆大量损坏。含硫气井在钻井过程中,由于湿硫化氢的出现,常常会出现油管、套管、钻井设备、钻井仪器以及对支持保护管柱的水泥环柱等腐蚀和损坏问题,为此,阐述了湿硫化氢的腐蚀特点、机理,归纳总结了影响腐蚀的因素,综述了如何在这些方面防止其腐蚀,使损失减小,为指导油管、套管防腐工程实践提供了依据。建议在钻井过程中采用碱性钻井液,其pH值可到9或更高(至pH值12),以减缓或防止钻井过程中电化学从硫化物应力腐蚀破裂;含硫气井用的钻杆应该间歇使用。钻杆停用堆置时间可使其放氢,使钻杆恢复韧性,防止硫化物应力腐蚀断裂。 相似文献
46.
W. Shieh R. Hui X. Yi 《Photonics Technology Letters, IEEE》2006,18(10):1122-1124
We perform a systematic measurement of the degree-of-polarization (DOP) and eye-closure penalty for optical signals with orthogonal polarizations. We find that the symmetry of DOP is maintained for the orthogonal polarizations under both first and higher order polarization-mode dispersion (PMD), whereas the symmetry of eye-closure penalty is broken under second-order PMD. An orthogonal polarization pair can have large disparity of eye-closure penalty despite an identical DOP. We also demonstrate a novel approach to estimate the maximum eye-closure penalty asymmetry with three orthogonal polarizations on the Poincare/spl acute/ sphere. 相似文献
47.
Analysis and architecture design of variable block-size motion estimation for H.264/AVC 总被引:1,自引:0,他引:1
Ching-Yeh Chen Shao-Yi Chien Yu-Wen Huang Tung-Chien Chen Tu-Chih Wang Liang-Gee Chen 《IEEE transactions on circuits and systems. I, Regular papers》2006,53(3):578-593
Variable block-size motion estimation (VBSME) has become an important video coding technique, but it increases the difficulty of hardware design. In this paper, we use inter-/intra-level classification and various data flows to analyze the impact of supporting VBSME in different hardware architectures. Furthermore, we propose two hardware architectures that can support traditional fixed block-size motion estimation as well as VBSME with less chip area overhead compared to previous approaches. By broadcasting reference pixel rows and propagating partial sums of absolute differences (SADs), the first design has the fewer reference pixel registers and a shorter critical path. The second design utilizes a two-dimensional distortion array and one adder tree with the reference buffer that can maximize the data reuse between successive searching candidates. The first design is suitable for low resolution or a small search range, and the second design has advantages of supporting a high degree of parallelism and VBSME. Finally, we propose an eight-parallel SAD tree with a shared reference buffer for H.264/AVC integer motion estimation (IME). Its processing ability is eight times of the single SAD tree, but the reference buffer size is only doubled. Moreover, the most critical issue of H.264 IME, which is huge memory bandwidth, is overcome. We are able to save 99.9% off-chip memory bandwidth and 99.22% on-chip memory bandwidth. We demonstrate a 720-p, 30-fps solution at 108 MHz with 330.2k gate count and 208k bits on-chip memory. 相似文献
48.
Wu-An Kuo TingTing Hwang Wu A.C.-H. 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》2006,14(1):81-85
This paper presents a novel power-driven multiplication instruction-set design method for application-specific instruction-set processors (ASIPs). Based on a dual-and-configurable-multiplier structure, our proposed method devises a multiplication instruction set for low-power ASIPs. Our method exploits the execution sequences of multiplication instructions and effective bit widths of variables to reduce power consumed by redundant multiplication bits while minimizing the multiplication execution time. Experimental results on a set of DSP programs demonstrate that our proposed method achieves significant power reduction (up to 18.53%) and execution time improvement (up to 10.43%) with 18% area overhead. 相似文献
49.
50.
Finite sample size effect on minimum variance beamformers: optimum diagonal loading factor for large arrays 总被引:6,自引:0,他引:6
Minimum variance beamformers are usually complemented with diagonal loading techniques in order to provide robustness against several impairments such as imprecise knowledge of the steering vector or finite sample size effects. This paper concentrates on this last application of diagonal loading techniques, i.e., it is assumed that the steering vector is perfectly known and that diagonal loading is used to alleviate the finite sample size impairments. The analysis herein is asymptotic in the sense that it is assumed that both the number of antennas and the number of samples are high but have the same order of magnitude. Borrowing some results of random matrix theory, the authors first derive a deterministic expression that describes the asymptotic signal-to-noise-plus-interference ratio (SINR) at the output of the diagonally loaded beamformer. Then, making use of the statistical theory of large observations (also known as general statistical analysis or G-analysis), the authors derive an estimator of the optimum loading factor that is consistent when both the number of antennas and the sample size increase without bound at the same rate. Because of that, the estimator has an excellent performance even in situations where the quotient between the number of observations is low relative to the number of elements of the array. 相似文献