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111.
Presented in this paper is a topology reconstruction algorithm from a set of unorganized trimmed surfaces. Error-prone small geometric elements are handled to give proper topological information. It gives complete topology to topologically complete models, and it is also tolerant to incomplete models. The proposed algorithm is vertex-based in that clues for topological information are searched from the set of vertices first, not from that of edges.  相似文献   
112.
Effects of austenitizing treatment temperatures on aqueous corrosion properties of martensitic stainless steels were investigated by electrochemical tests (potentiodynamic test, potentiostatic test and electrochemical impedance spectroscopy), and surface analyses (optical microscopy and XRD). The results of potentiodynamic test revealed that the breakdown potential increased with the increased austenitizing temperature, indicating increased relative resistance to initiation of localized corrosion. EIS measurements showed that MSS3 (1030 °C) exhibits larger polarization resistance value than MSS1 (970 °C) and MSS2 (1000 °C) at passive and breakdown states. This was caused by decreasing the amount of Cr-rich M23C6 carbide which acts as preferential sites for pitting corrosion.  相似文献   
113.
Understanding how aging influences cognition across different cultures has been hindered by a lack of standardized, cross-referenced verbal stimuli. This study introduces a database of such item-level stimuli for both younger and older adults, in China and the United States, and makes 3 distinct contributions. First, the authors specify which item categories generalize across age and/or cultural groups, rigorously quantifying differences among them. Second, they introduce novel, powerful methods to measure between-group differences in freely generated ranked data, the rank-ordered logit model and Hellinger Affinity. Finally, a broad archive of tested, cross-linguistic stimuli is now freely available to researchers: data, similarity measures, and all stimulus materials for 105 categories and 4 culture-by-age groups, comprising over 10,000 fully translated unique item responses. (PsycINFO Database Record (c) 2010 APA, all rights reserved)  相似文献   
114.
In this paper, we propose an efficient design method for area optimization in a digital filter. The conventional methods to reduce the number of adders in a filter have the problem of a long critical path delay caused by the deep logic depth of the filter due to adder sharing. Furthermore, there is such a disadvantage that they use the transposed direct form (TDF) filter which needs more registers than those of the direct form (DF) filter. In this paper, we present a hybrid structure of a TDF and DF based on the flattened coefficients method so that it can reduce the number of flip‐flops and full‐adders without additional critical path delay. We also propose a resource sharing method and sharing‐pattern searching algorithm to reduce the number of adders without deepening the logic depth. Simulation results show that the proposed structure can save the number of adders and registers by 22 and 26%, respectively, compared to the best one used in the past.  相似文献   
115.
This paper proposes a new LDMOSFET structure with a trenched sinker for high‐power RF amplifiers. Using a low‐temperature, deep‐trench technology, we succeeded in drastically shrinking the sinker area to one‐third the size of the conventional diffusion‐type structure. The RF performance of the proposed device with a channel width of 5 mm showed a small signal gain of 16.5 dB and a maximum peak power of 32 dBm with a power‐added efficiency of 25% at 2 GHz. Furthermore, the trench sinker, which was applied to the guard ring to suppress coupling between inductors, showed an excellent blocking performance below ?40 dB at a frequency of up to 20 GHz. These results confirm that the proposed trenched sinker should be an effective technology both as a compact sinker for RF power devices and as a guard ring against coupling.  相似文献   
116.
In contrast to the conventional theories, we have revealed that the most distinguished mechanism in the data retention phenomenon after Fowler-Nordheim (FN) stress in sub-100 nm NAND Flash memory cells is the annihilation of interface states. Interface state generation rate increases rapidly as the channel width of NAND flash cell decreases. Comparison of interface states and stress-induced leakage current (SILC) component during retention mode shows that the annihilation of interface states strongly affects data retention characteristics of the programmed cells.  相似文献   
117.
Alumina-supported vanadium oxide, VOx/Al2O3, and binary vanadium–antimony oxides, VSbOx/Al2O3, have been tested in the ethylbenzene dehydrogenation with carbon dioxide and characterized by SBET, X-ray diffraction, X-ray photoelectron spectroscopy, hydrogen temperature-programmed reduction and CO2 pulse methods. VSbOx/Al2O3 exhibited enhanced catalytic activity and especially on-stream stability compared to VOx/Al2O3 catalyst. Incorporation of antimony into VOx/Al2O3 increased dispersion of active VOx species, enhanced redox properties of the systems and formed a new mixed vanadium–antimony oxide phase in the most catalytically efficient V0.43Sb0.57Ox/Al2O3 system.  相似文献   
118.
A new discontinuous modulation method based on space-vector control is proposed and analyzed. The proposed technique employs a pulse-dropping method and is designed in the time domain. It features a very wide modulation range while maintaining the required waveform qualities and switching numbers in the overmodulation region. Since the modulation method and modulation index equation are simple, the proposed technique can be easily implemented by software and is applicable to the overmodulation region in ac motor drives. The performance indexes are discussed and experiments have been performed.  相似文献   
119.
The authors report the implementation of deep-submicrometer Si MOSFETs that at room temperature have a unity-current-gain cutoff frequency (fT) of 89 GHz, for a drain-to-source bias of 1.5 V, a gate-to-source bias of 1 V, a gate oxide thickness of 40 Å, and a channel length of 0.15 μm. The fabrication procedure is mostly conventional, except for the e-beam defined gates. The speed performance is achieved through an intrinsic transit time of only 1.8 ps across the active device region  相似文献   
120.
A practical model for a single-electron transistor (SET) was developed based on the physical phenomena in realistic Si SETs, and implemented into a conventional circuit simulator. In the proposed model, the SET current calculated by the analytic model is combined with the parasitic MOSFET characteristics, which have been observed in many recently reported SETs formed on Si nanostructures. The SPICE simulation results were compared with the measured characteristics of the Si SETs. In terms of the bias, temperature, and size dependence of the realistic SET characteristics, an extensive comparison leads to good agreement within a reasonable level of accuracy. This result is noticeable in that a single set of model parameters was used, while considering divergent physical phenomena such as the parasitic MOSFET, the Coulomb oscillation phase shift, and the tunneling resistance modulated by the gate bias. When compared to the measured data, the accuracy of the voltage transfer characteristics of a single-electron inverter obtained from the SPICE simulation was within 15%. This new SPICE model can be applied to estimating the realistic performance of a CMOS/SET hybrid circuit or various SET logic architectures.  相似文献   
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