Wavelength and Waveband Assignment for Ring Networks Based on Parallel Multi‐granularity Hierarchical OADMs

In this paper we study the optimization issues of ring networks employing novel parallel multi‐granularity hierarchical optical add‐drop multiplexers (OADMs). In particular, we attempt to minimize the number of control elements for the off‐line case. We present an integer linear programming formulation to obtain the lower bound in optimization, and propose an efficient heuristic algorithm called global bandwidth resource assignment that is suitable for the design of large‐scale OADM networks.     

交叉试验

发生了质量事故,是设备、操作等硬件的缘故,抑或药液的缘故?通过交叉试验的故事,把真相找了出来。     

Efficient design and operation of a data acquisition system for pressurized pipeline systems.

The unsteady flow analysis of pipeline systems provides useful guidelines for implementing data acquisition components such as data filtering ranges, sensor locations and sampling frequencies. A theoretical integration among hydraulics, free vibration analysis and signal processing is proposed for a comprehensive approach aiming at enhanced design and operation of data acquisition system. Transient analysis is performed to extract flow variation by a valve modulation in a pipeline system. Frequency transformation analysis is developed to convert pressure variations between time domain and frequency domain. Free vibration analysis provides spatial distribution of impedance characteristics and pressure variation for determining optimum sensor location. A real-time filter can be designed to secure valid signals of any particular unsteady event. Hypothetical and experimental applications show that the proposed method has potentials of the leakage detection of a pipeline system as well as an efficient design of data acquisition system.     

Ethylene polymerization over MgO‐supported zirconocene catalysts

Supported zirconcene catalysts on a new support, MgO, were prepared and tested in ethylene polymerization. Three types of impregnation methods were employed to find an optimum supporting method for MgO. The direct impregnation of Cp₂ZrCl₂ on MgO showed low metal loading and polymerization activity, while the catalyst had a higher metal loading and polymerization activity when MgO was treated with methylaluminoxane (MAO) before supporting. Treatment of MgO with MAO during the supporting step invoked two types of catalytic sites, which was evidenced by the bimodal molecular weight distribution of the polymer products. MgO is considered to have potential as a support for metallocenes.     

Synthesis of ZSM‐5 Films and Monoliths with Bimodal Micro/Mesoscopic Structures

A route to synthesize ZSM‐5 crystals with a bimodal micro/mesoscopic pore system has been developed in this study; the successful incorporation of the mesopores within the ZSM‐5 structure was performed using tetrapropylammonium hydroxide (TPAOH)‐impregnated mesoporous materials containing carbon nanotubes in the pores, which were encapsulated in the ZSM‐5 crystals during a solid rearrangement process within the framework. Such mesoporous ZSM‐5 zeolites can be readily obtained as powders, thin films, or monoliths.     

Passive alignment method of polymer PLC devices by using a hot embossing technique

A novel fabrication process using a hot embossing technique has been developed for micromechanical passive alignment of polymer planar lightwave circuit (PLC) devices. With only one step of embossing, single-mode waveguide straight channels and micropedestals for passive aligning are simultaneously defined on a polymer thin film with an accuracy of /spl plusmn/0.5 /spl mu/m. This process reduces the steps for fabricating alignment structures. A fabricated polymer PLC chip and fibers are combined on a v-grooved silicon optical bench (SiOB) in a flip-chip manner. The process provides a coupling loss as low as 0.67 dB per coupling face and a cost-effective packaging solution for various polymer PLC devices.     

Scaling planar silicon devices

The generation-over-generation scaling of critical CMOS technology parameters is ultimately bound by nonscalable limitations, such as the thermal voltage and the elementary electronic charge. Sustained improvement in performance and density has required the introduction of new device structures and materials. Partially depleted SOI, a most recent MOSFET innovation, has extended VLSI performance while introducing unique idiosyncrasies. Fully depleted SOI is one logical extension of this device design direction. Gate dielectric tunneling, device self-heating, and single-event upsets present developers of these next-generation devices with new challenges. Strained silicon and high-permittivity gate dielectric are examples of new materials that will enable CMOS developers to continue to deliver device performance enhancements in the sub-100 nm regime.     

Effects of SiN passivation and high-electric field on AlGaN-GaN HFET degradation

The authors report on the effects of silicon nitride (SiN) surface passivation and high-electric field stress (hot electron stress) on the degradation of undoped AlGaN-GaN power HFETs. Stressed devices demonstrated a decrease in the drain current and maximum transconductance and an increase in the parasitic drain series resistance, gate leakage, and subthreshold current. The unpassivated devices showed more significant degradation than SiN passivated devices. Gate lag phenomenon was observed from unpassivated devices and removed by SiN passivation. However, SiN passivated devices also showed gate lag phenomena after high-electric field stress, which suggests possible changes in surface trap profiles occurred during high-electric field stress test.     

High-performance MIM capacitor using ALD high-k HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectrics

For the first time, we successfully fabricated and demonstrated high performance metal-insulator-metal (MIM) capacitors with HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectric using atomic layer deposition (ALD) technique. Our data indicates that the laminate MIM capacitor can provide high capacitance density of 12.8 fF//spl mu/m/sup 2/ from 10 kHz up to 20 GHz, very low leakage current of 3.2 /spl times/ 10/sup -8/ A/cm/sup 2/ at 3.3 V, small linear voltage coefficient of capacitance of 240 ppm/V together with quadratic one of 1830 ppm/V/sup 2/, temperature coefficient of capacitance of 182 ppm//spl deg/C, and high breakdown field of /spl sim/6 MV/cm as well as promising reliability. As a result, the HfO/sub 2/-Al/sub 2/O/sub 3/ laminate is a very promising candidate for next generation MIM capacitor for radio frequency and mixed signal integrated circuit applications.     

Characteristics of low-leakage deep-trench diode for ESD protection design in 0.18-/spl mu/m SiGe BiCMOS process

This paper proposes a novel low-leakage BiCMOS deep-trench (DT) diode in a 0.18-/spl mu/m silicon germanium (SiGe) BiCMOS process. By means of the DT and an n/sup +/ buried layer in the SiGe BiCMOS process, a parasitic vertical p-n-p bipolar transistor with an open-base configuration is formed in the BiCMOS DT diode. Based on the two-dimensional (2-D) simulation and measured results, the BiCMOS DT diode indeed has the lowest substrate leakage current as compared to the conventional p/sup +//n-well diode even at high temperature conditions, which mainly results from the existence of the parasitic open-base bipolar transistor. Considering the applications of the diode string in electrostatic discharge (ESD) protection circuit designs, the BiCMOS DT diode string also provides a good ESD performance. Owing to the characteristics of the low leakage current and high ESD robustness, it is very convenient for circuit designers to use the BiCMOS DT diode string in their IC designs.