A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor

A 4-MB L2 data cache was implemented for a 64-bit 1.6-GHz SPARC(r) RISC microprocessor. Static sense amplifiers were used in the SRAM arrays and for global data repeaters, resulting in robust and flexible timing operation. Elimination of the global clock grid over the SRAM array saves power, enabled by combining the clock information with array select signals. Redundancy was implemented flexibly, with shift circuits outside the main data array for area efficiency. The chip integrates 315 million transistors and uses an 8-metal-layer 90-nm CMOS process.     

Profile dependence and measurement of absolute Raman scattering cross-section in optical fibres

A simple measurement method for the absolute Raman scattering cross-section of an optical fibre is presented. This method does not require a high power pump laser and it measures the fibre directly. It is also shown that the calculation of the cross-section depends on the fibre structure, such as its refractive index profile and the differential attenuation between the pump wavelength and Raman wavelength.<>     

Analysing inaccurate artifact usages in workflow specifications

Although many workflow models have been proposed, analyses on artifacts are seldom discussed. A workflow application with well structured and adequate resources may still fail or yield unexpected results in execution due to inaccurate artifact manipulation, for example, inconsistency between data flow and control flow, or contradictions between artifact operations. Thus, artifact analysis is very important since activities cannot be executed properly without accurate information. This paper presents a three-layer workflow model for designing a workflow and characterises the behaviour of an artifact by its state transition diagram. By abstracting common usages of artifacts, six types of inaccurate artifact usage affecting workflow execution are identified and a set of algorithms to detect these inaccurate usages in workflow specifications is presented. An example is demonstrated and then related works are compared.     

A 4.5-GHz 130-nm 32-KB L0 cache with a leakage-tolerant self reverse-bias bitline scheme

This paper describes a 32-KB two-read, one-write ported L0 cache for 4.5-GHz operation in 1.2-V 130-nm dual-V/sub TH/ CMOS technology. The local bitline uses a leakage-tolerant self reverse-bias (SRB) scheme with nMOS source-follower pullup access transistors, while preserving robust full-swing operation. Gate-source underdrive of -220 mV on the bitline read-select transistors is established without external bias voltages or gate-oxide overstress. Device-level measurements in the 130-nm technology show 72/spl times/ bitline active leakage reduction, enabling low-V/sub TH/ usage, 40% bitline keeper downsizing, and 16 bitcells/bitline. 11% faster read delay and 2/spl times/ higher dc noise robustness are achieved compared with high-performance dual-V/sub TH/ bitline scheme. Sustained performance and robustness benefits of the SRB technique against conventional dynamic bitline with scaling to 100- and 70-nm technology is also presented.     

Photoreactivation of Escherichia coli following medium-pressure ultraviolet disinfection and its control using chloramination.

Ultraviolet (UV) disinfection is becoming increasingly popular as an alternative disinfection technology to chlorination in recent years. In this study, we investigated the photoreactivation of Escherichia coli following medium-pressure (MP) UV disinfection of synthetic water by a bench-scale collimated beam apparatus. The UV doses ranged from 1.6 -19.7 mWs/cm2 and photoreactivation was investigated for 6 hours under fluorescent light. In addition, chloramination was applied after UV disinfection to investigate its ability to control photoreactivation. It was found that photoreactivation occurred for all UV doses tested and the increase in bacteria numbers ranged from 0.04 to 1.35 log10. However, the degree of photoreactivation decreased with increased UV doses. Chloramination experiments revealed that the addition of 0.5 mg/l of monochloramine resulted in suppression of photoreactivation for 1 hour only. An increased monochloramine dose of 1 mg/l was found to prevent photoreactivation for the entire duration of the experiment. The results of this study have shown that photoreactivation occurs even after MP UV disinfection, although it is of a lesser extent at higher UV doses. This study has also established that secondary chloramination can effectively suppress and eliminate photoreactivation with a chloramine dose of 1 mg/l.     

Self-Consistent Effects on the Starting Current of Gyrotron Oscillators

Self-consistent effects on the starting current of gyrotron oscillators are examined. Field profiles in the open cavity are shown to be sensitive to the interaction dynamics. This can either significantly raise or lower the oscillation threshold, particularly for the low-Q modes. The transition from resonant-mode oscillations at the low magnetic field to backward-wave oscillations at the high magnetic field is demonstrated.     

Positively Thermo‐Sensitive Monodisperse Core–Shell Microspheres

In this paper, we report on a novel family of monodisperse thermo‐sensitive core–shell hydrogel microspheres that is featured with high monodispersity and positively thermo‐responsive volume phase transition characteristics with tunable swelling kinetics, i.e., the particle swelling is induced by an increase rather than a decrease in temperature. The microspheres were fabricated in a three‐step process. In the first step, monodisperse poly(acrylamide‐co‐styrene) seeds were prepared by emulsifier‐free emulsion polymerization. In the second step, poly(acrylamide) or poly[acrylamide‐co‐(butyl methacrylate)] shells were fabricated on the microsphere seeds by free radical polymerization. In the third step, the core–shell microspheres with poly‐ (acrylamide)/poly(acrylic acid) based interpenetrating polymer network (IPN) shells were finished by a method of sequential IPN synthesis. The proposed monodisperse core–shell microspheres provide a new mode of the phase transition behavior for thermo‐sensitive “smart” or “intelligent” monodisperse micro‐actuators that is highly attractive for targeting drug delivery systems, chemical separations, sensors, and so on.     

Effect of precyclic loading on stress-corrosion-cracking initiation in an X-65 pipeline steel exposed to near-neutral pH soil environment

A study was carried out to understand the effect of precyclic loading on stress-corrosion-crack initiation in an X-65 pipeline steel exposed to a near-neutral-pH soil environment. The test specimens were precyclically loaded before corrosion exposure to represent a service history of up to about 20 years, depending on the severity of pressure fluctuation. Microcracks had initiated on the polished surface of the X-65 pipeline steel after long-time exposure at open-circuit potential (OCP) in a near-neutral-pH synthetic soil solution. These microcracks were mostly initiated from pits at metallurgical discontinuities such as grain boundaries, pearlitic colonies, and banded phases in the steel. Strong preferential dissolution was observed along planes of the banded structures in the steel. The selective corrosion attack at these metallurgical discontinuities is attributed to the galvanic nature of those areas to their neighbors. Cyclic loading prior to corrosion exposure had significant effects on microcrack initiation and propagation during subsequent corrosion exposure. Cyclic loading prior to corrosion exposure either reduced or increased the probability of crack initiation and the rate of crack propagation, depending upon the magnitude of the stress cycles. The largest reduction was seen at a peak cyclic stress of about 0.8 of the yield strength. This cyclic-loading-dependent cracking behavior might be related to the alteration of the substructures and the residual stress in the steel as a result of precyclic loading.     

Two schemes for detecting CMOS analog faults

A design-for-testability scheme for detecting CMOS analog faults was reported by Favalli et al. (see ibid., vol.25, no.5, p.1239-46, 1990). The authors propose two alternative designs, one for small circuits and another for large circuits, which require significantly less area overhead (about 1/4 to 1/3) than that of Favalli's design. With the proposed modification in the first design, the untestable problem, which occurred in Favalli's design, can be alleviated. Furthermore, the proposed schemes are also fit to be implemented in VLSI circuits