共查询到20条相似文献,搜索用时 9 毫秒
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J. Gubelmann 《Microelectronics Journal》2009,40(8):1175-1183
This paper describes the analysis and design of a dynamic supply CMOS audio power amplifier for low-power applications. The dynamic supply technique is used to increase the efficiency of a class AB power amplifier. The polarization of its output stage is adaptive so that the maximum efficiency enhancement can be achieved without jeopardizing the linearity of the system. Two types of adaptive polarization are proposed and compared. A concept of power supplies switching is also proposed. Simulation results are presented showing that an efficiency of 53.6% at a total harmonic distortion (THD) of less than 0.1% can be achieved, whereas the maximal theoretical value for a class AB amplifier is approximately 33.3%. 相似文献
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针对音响功放环保节能的需要,设计一款新型功放开关电源的控制系统,该系统可应用于大型功放系统的DSP控制。详细描述系统的组成结构和软硬件设计。该系统采用TMS320F2812为主控制器,电路结构简化,数字控制功放电源。实验结果表明,该系统具有良好的调节功能,既满足一定控制精度要求。又满足实时性要求,在高端大功率音响功放中具有较大的应用前景。 相似文献
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针对音响功放环保节能的需要,设计一款新型功放开关电源的控制系统,该系统可应用于大型功放系统的DSP控制.详细描述系统的组成结构和软硬件设计.该系统采用TMS320F2812为主控制器,电路结构简化,数字控制功放电源.实验结果表明.该系统具有良好的调节功能,既满足一定控制精度要求,又满足实时性要求,在高端大功率音响功放中具有较大的应用前景. 相似文献
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Youngsoo Shin Kiyoung Choi Young-Hoon Chang 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》2001,9(5):656-660
High levels of integration in integrated circuits often lead to the problem of running out of pins. Narrow data buses can be used to alleviate this problem provided that the degraded performance due to wait cycles can be tolerated. We address bus coding methods for low-power core-based systems incorporating narrow buses. We show that transition signaling combined with bus-invert coding, which we call BITS coding, is particularly suitable for the data patterns of typical DSP applications on narrow data buses. The application of BITS coding to real circuit design is limited by the extra bus line introduced, which changes the pinout of the chip. We propose a new coding method, which does not require the extra bus line but retains the advantage of BITS 相似文献
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《Solid-State Circuits, IEEE Journal of》1980,15(6):1005-1013
A single chip PCM channel filter with improved overall performance characteristics is described. The most important characteristics are power dissipation, idle channel noise, and power supply rejection. The filter described uses switched capacitor techniques and contains two fifth-order low-pass filters, a 50/60 Hz rejection filter, internal anti-alias filters, and a 600 ohm line driver. The filter is implemented in a two layer NMOS silicon gate technology. Experimental results are presented. 相似文献
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Pant P. De V.K. Chatterjee A. 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》1998,6(4):538-545
This paper demonstrates a new approach for minimizing the total of the static and the dynamic power dissipation components in a complementary metal-oxide-semiconductor (CMOS) logic network required to operate at a specified clock frequency. The algorithms presented can be used to design ultralow-power CMOS logic circuits by joint optimization of supply voltage, threshold voltage and device widths. The static, dynamic and short-circuit energy components are considered and an efficient heuristic is developed that delivers over an order of magnitude savings in power over conventional optimization methods 相似文献
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A low-power DSP core-based software radio architecture 总被引:1,自引:0,他引:1
Gunn J.E. Barron K.S. Ruczczyk W. 《Selected Areas in Communications, IEEE Journal on》1999,17(4):574-590
This paper describes an approach to developing a low-power digital signal processor (DSP) subsystem architecture for advanced software radio platforms. The architecture is intended to support next-generation wide-band spread-spectrum military waveforms. The methodology illustrates how a next-generation programmable DSP core forms the basis for an application-specific integrated circuit (ASIC). It also shows how semiconductor technologies can be integrated into such chips to achieve algorithm performance while minimizing subsystem power consumption. The ASIC is run-time configurable to maintain high flexibility. The range of RF channel modulation (“waveforms”) and air interfaces is intended to include both wide-band and traditional narrow-band waveforms. Estimated gate counts and power-consumption estimates are presented. DSP circuit-design and power-management strategies necessary to achieve low-power operation are presented. While the architecture discussion focuses on military waveforms, the approach is also applicable to commercial waveforms 相似文献
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设计一种基于DSP的中频电源测试系统,该系统以DSP2407为控制核心,利用其对数字信号强大的处理能力,对115 V/400 Hz信号进行采集、分析与计算.详细介绍了其硬件电路与软件流程,采用电压互感器SPT204A对输入信号进行调节和隔离,并通过A/D采集电压信号、CAP捕获频率信号、液晶显示最终结果.系统不仅完成了对中频电源交流电压与频率的测试,而且为强电转化弱电提出了一种方案,简化了以往对交流信号的调理电路.该系统具有操作简单,易于实现等优点,可推广使用于其他中频军用设备以及民用设备的系统测试. 相似文献
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超长指令字(Very Lone Instruction Word,VLIW)结构是数字信号处理器(DSO))设计中的一种常用结构.用户在开发应用程序的过程中常常会出现错误,查找并修复错误的调试过程要求芯片具有硬件调试功能.对此提出了一种适用于VLIW结构DSP的嵌入调试结构,通过为数不多的调试接口,能够观察芯片的内部信号,设置芯片的状态,控制程序执行过程,从而实现芯片的硬件调试.最后,在一款VLIW结构的DSP-THUASDSP2004上,实现了提出的嵌入调试结构. 相似文献
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1 V power supply, low-power consumption A/D conversion techniquewith swing-suppression noise shaping
A 1 V power supply and low-power consumption A/D conversion technique using swing-suppression noise shaping is proposed. This technique makes it possible to power the on chip A/D converter in digital LSI's directly by a one-cell battery, without a dc-dc converter. Experimental results indicated good performance for the RF-to-baseband analog interface of a digital cordless phone. The A/D converter, fabricated with a 0.5 μm CMOS process, operates on a 1 V power supply, has a 10 bit dynamic-range with a 384 ksps sampling speed and consumes only 1.56 mW 相似文献
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Gemmeke T. Gansen M. Stockmanns H.J. Noll T.G. 《Solid-State Circuits, IEEE Journal of》2004,39(7):1131-1139
In recent years, power dissipation along with silicon area has become the key figure in chip design. The increasing demands on system performance require high-performance digital signal processing (DSP) systems to include dedicated number-crunching units as individually optimized building blocks. The various design methodologies in use stress one of the following figures: power dissipation, throughput, or silicon area. This paper presents a design methodology reducing any combination of cost drivers subject to a specified throughput. As a basic principle, the underlying optimization regards the existing interactions within the design space of a building block. Crucial in such optimization is the proper dimensioning of device sizes in contrast to the common use of minimal dimensions in low-power implementations. Taking the design space of an FIR filter as an example, the different steps of the design process are highlighted resulting in a low-power high-throughput filter implementation. It is part of an industrial read-write channel chip for hard disks with a worst case throughput of 1.6 GSamples/s at 23 mW in a 0.13-/spl mu/m CMOS technology. This filter requires less silicon area than other state-of-the-art filter implementations, and it disrupts the average trend of power dissipation by a factor of 6. 相似文献
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为了使开关电源具有体积小、智能化等特点,提出采用DSP数字处理技术和模糊PID控制相结合,设计完成了具有响应快、效率高的智能开关电源。通过与外围EMI滤波电路、光电隔离、保护电路等配合,解决了开关电源对电网的污染,保护开关电源因温度等不确定因素对开关电源造成的损坏。本开关电源控制算法先进,设计合理,具有较强的工程应用参考价值。 相似文献
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《现代电子技术》2017,(10)
由于动态光调节下的数字式LED驱动电源设计不完善,使动态光对LED的调节无法达到预期效果,而嵌入式系统则可有效提升LED驱动电源各项性能。为此,设计基于嵌入式系统的动态光调节下数字式LED驱动电源。其中的A/D采集模块对动态光调节下的数字式LED数据进行采集、整流、滤波和A/D转换,得到A/D采样数据并传输到驱动电路。驱动电路采用嵌入式设计对A/D采样数据进行优化,进而实现对LED发光的合理控制和动态光对数字式LED的有效调节。C8051F021芯片是基于嵌入式系统的动态光调节下数字式LED驱动电源的"管理者",其管理流程图于软件中给出。软件还对A/D采集模块的数据采集语言进行了设计。实验结果表明,所设计的数字式LED驱动电源驱动性能强、电源转换效率高。 相似文献