基于探索式分区和测试向量生成的硬件木马检测方法

本文提出基于分区和最优测试向量生成的硬件木马检测方法.首先,采用基于扫描细胞分布的分区算法将电路划分为多个区域.然后,提出测试向量重组算法,对各区域依据其自身结构生成近似最优的测试向量.最后,进行分区激活和功耗分析以检测木马,并采用信号校正技术消减制造变异和噪声的影响.优点是成倍提高了检测精度,克服了制造变异的影响,解决了面对大电路的扩展性问题,并可以定位木马.在基准电路上的验证实验表明检测性能有较大的提升.     

硬件木马检测与防护

第三方技术服务的普及使得在集成电路（IC）设计制造过程中,芯片可能被恶意植入“硬件木马”,给芯片的安全性带来了极大挑战,由此,如何检测“安全芯片”中是否存在硬件木马,确保芯片的安全性开始受到人们的广泛关注.在简要介绍硬件木马概念及其危害的基础上,分析硬件木马的特点和结构,介绍了当前现有的几种硬件木马检测技术,给出了硬件木马检测技术的科学分类,重点分析了这些检测方法所面临的问题和挑战并提出了相应的改进措施,总结了未来硬件木马防测技术的发展趋势.     

基于电路模块自相似性的硬件木马检测方法

由于硬件木马种类的多样性和SoC电路制造过程中不可预测的工艺变化,硬件木马检测变得极具挑战性。现有的旁路信号分析法存在两个缺点,一是需要黄金模型作为参考,二是工艺波动会掩盖部分硬件木马的活动效果。针对上述不足,提出一种利用电路模块结构自相似性的无黄金模型检测方法。通过对32位超前进位加法器的软件仿真实验和对128位AES加密电路的硬件仿真实验,验证了该方法的有效性。实验结果表明,在45 nm工艺尺寸下,对于面积占比较小的硬件木马,该方法的检测成功率可以达到90.0%以上。     

Golden-Free Processor Hardware Trojan Detection Using Bit Power Consistency Analysis

Processor is the core chip of modern information system, which is severely threatened by hardware Trojan. Side-channel analysis is the most promising method for hardware Trojan detection. However, most existing detection methods require golden chips as reference, which significantly increases the test cost and complexity. In this paper, we propose a golden-free detection method that exploits the bit power consistency of processor. For the data activated processor hardware Trojan, the power model of processor is modified. Two decomposition methods of power signal are proposed: the differential bit power consistency analysis and the contradictory equations solution. With the proposed method, each bit power can be calculated. The bit consistency based detection algorithms are proposed, the deviation boundaries are obtained by statistical analysis. Experimental measurements were done on field programmable gate array chip with open source 8051 core and hardware Trojans. The results showed that the differences between the two methods were very small. The data activated processor hardware Trojans were detected successfully.     

基于XGBoost的混合模式门级硬件木马检测方法

针对恶意的第三方厂商在电路设计阶段中植入硬件木马的问题,该文提出一种基于XGBoost的混合模式门级硬件木马检测方法。该检测方法将电路的每个线网类型作为节点,采用混合模式3层级的检测方式。首先,基于提取的电路静态特征,利用XGBoost算法实现第1层级的检测。继而,通过分析扫描链的结构特征,对第1层级分离得到的正常电路继续进行第2层级的面向扫描链中存在木马电路的静态检测。最后,在第3层级采用动态检测方法进一步提升检测的准确性。Trust-Hub基准测试集的实测结果表明,该方法与现有的其他检测方法相比具有较优的木马检测率,可达到94.0%的平均真阳率(TPR)和99.3%的平均真阴率(TNR)。     

基于多维结构特征的硬件木马检测技术

硬件木马是第三方知识产权(IP)核的主要安全威胁,现有的安全性分析方法提取的特征过于单一,导致特征分布不够均衡,极易出现较高的误识别率。该文提出了基于有向图的门级网表抽象化建模算法,建立了门级网表的有向图模型,简化了电路分析流程;分析了硬件木马共性特征,基于有向图建立了涵盖扇入单元数、扇入触发器数、扇出触发器数、输入拓扑深度、输出拓扑深度、多路选择器和反相器数量等多维度硬件木马结构特征;提出了基于最近邻不平衡数据分类(SMOTEENN)算法的硬件木马特征扩展算法,有效解决了样本特征集较少的问题,利用支持向量机建立硬件木马检测模型并识别出硬件木马的特征。该文基于Trust_Hub硬件木马库开展方法验证实验,准确率高达97.02%,与现有文献相比真正类率(TPR)提高了13.80%,真负类率(TNR)和分类准确率(ACC)分别提高了0.92%和2.48%,在保证低假阳性率的基础上有效识别硬件木马。     

Security Against Hardware Trojan Attacks Using Key-Based Design Obfuscation

Malicious modification of hardware in untrusted fabrication facilities, referred to as hardware Trojan, has emerged as a major security concern. Comprehensive detection of these Trojans during post-manufacturing test has been shown to be extremely difficult. Hence, it is important to develop design techniques that provide effective countermeasures against hardware Trojans by either preventing Trojan attacks or facilitating detection during test. Obfuscation is a technique that is conventionally employed to prevent piracy of software and hardware intellectual property (IP). In this work, we propose a novel application of key-based circuit structure and functionality obfuscation to achieve protection against hardware Trojans triggered by rare internal circuit conditions. The proposed obfuscation scheme is based on judicious modification of the state transition function, which creates two distinct functional modes: normal and obfuscated. A circuit transitions from the obfuscated to the normal mode only upon application of a specific input sequence, which defines the key. We show that it provides security against Trojan attacks in two ways: (1) it makes some inserted Trojans benign, i.e. they become effective only in the obfuscated mode; and (2) it prevents an adversary from exploiting the true rare events in a circuit to insert hard-to-detect Trojans. The proposed design methodology can thus achieve simultaneous protection from hardware Trojans and hardware IP piracy. Besides protecting ICs against Trojan attacks in foundry, we show that it can also protect against malicious modifications by untrusted computer-aided design (CAD) tools in both SoC and FPGA design flows. Simulation results for a set of benchmark circuits show that the scheme is capable of achieving high levels of security against Trojan attacks at modest area, power and delay overhead.     

基于投影寻踪分析的芯片硬件木马检测

提出一种利用芯片旁路泄漏信息的硬件木马无损检测方法,通过基于绝对信息散度指标的投影寻踪技术,将芯片运行过程中产生的高维旁路信号投影变换到低维子空间,在信息损失尽量小的前提下发现原始数据中的分布特征,从而实现芯片旁路信号特征提取与识别。针对示例性高级加密标准(AES-128)木马电路的检测实验表明,该技术可以有效分辨基准芯片与硬件木马测试芯片之间的旁路信号特征差异,实现硬件木马检测。     

基于特征提取和SVM的硬件木马检测方法

针对现有基于机器学习的硬件木马检测方法检测率不高的问题,提出了一种基于特征提取和支持向量机(SVM)的硬件木马检测方法。首先在门级网表的节点中提取6个与硬件木马强相关的特征,并将其作为6维特征向量。然后将这些特征向量分为训练集和测试集。最后使用SVM检测木马。将该方法应用于15个Trust-Hub基准电路,实验结果表明,该方法可实现高达93%的平均硬件木马检测率,部分基准电路的硬件木马检测率达到100%。     

一种面向粗粒度可重构阵列的硬件木马检测算法的设计与实现

硬件木马检测已成为当前芯片安全领域的研究热点,现有检测算法大多面向ASIC电路和FPGA电路,且依赖于未感染硬件木马的黄金芯片,难以适应于由大规模可重构单元组成的粗粒度可重构阵列电路。因此,该文针对粗粒度可重构密码阵列的结构特点,提出基于分区和多变体逻辑指纹的硬件木马检测算法。该算法将电路划分为多个区域,采用逻辑指纹特征作为区域的标识符,通过在时空两个维度上比较分区的多变体逻辑指纹,实现了无黄金芯片的硬件木马检测和诊断。实验结果表明,所提检测算法对硬件木马检测有较高的检测成功率和较低的误判率。     

基于旁路分析的集成电路芯片硬件木马检测

针对密码芯片中硬件木马电路检测的困难性,介绍了根据芯片旁路信息进行硬件木马检测的思想．在形式化定义基于旁路分析的硬件木马检测问题的基础上,分析了含硬件木马与不含硬件木马的密码芯片对应旁路信号在主成份分析结果上的差异,并以此对FPGA实现的含硬件木马的DES密码原型芯片进行了检测实验,实验结果表明了基于旁路信号主成份分析在密码芯片硬件木马检测中的效果．     

用于预防硬件木马植入的协同自测功耗检测方法

针对现有内建自认证方法中核心占用率较高时存在冗余门的问题,提出了一种用于预防硬件木马植入的协同自测功耗检测方法。首先选择功能标准单元填满未使用的区域,接着采用路径规划算法对自测电路的标准单元进行分配优化,构建无冗余门的自测电路,然后将剩余的标准单元构成功耗检测电路。最后,对自测电路的输出签名和功耗检测电路的功耗进行检测,判断是否存在硬件木马。实验结果表明,与现有的内建自认证方法相比,该方法应用于具有较高核心占用率的电路后,不仅没有产生冗余门电路,还能有效检测并预防硬件木马的植入。     

基于温度特征分析的硬件木马检测方法

硬件木马是一种在特定条件下使集成电路失效或泄露机密信息等的恶意电路,给现代信息系统带来了严重的安全隐患。该文基于硬件木马在芯片工作之初造成的温度响应特征,提出一种利用芯片温度变化特性并进行比对的硬件木马检测方法。该方法采用环形振荡器作为片内温度特征测量传感器,提取温度变化特征信息,并采用曲线拟合评价指标来评估硬件木马对温度变化特征的影响,通过比对无木马芯片温度响应特征从而完成木马检测。通过对10个不同芯片的检测,结果表明该方法能够对面积消耗32个逻辑单元硬件木马的检测率达到100%,对16个逻辑单元检测概率也能达到90%;同时检测结果表明该方法完成硬件木马检测后,能够对硬件木马的植入位置进行粗定位。     

一种基于压缩边界Fisher分析的硬件木马检测方法

针对物理环境下旁路分析技术对电路中规模较小的硬件木马检出率低的问题,该文引入边界Fisher分析(MFA)方法,并提出一种基于压缩边界Fisher分析(CMFA)的硬件木马检测方法。通过减小样本的同类近邻样本与该样本以及类中心之间距离和增大类中心的同类近邻样本与异类样本之间距离的方式,构建投影空间,发现原始功耗旁路信号中的差异特征,实现硬件木马检测。AES加密电路中的硬件木马检测实验表明,该方法具有比已有检测方法更高的检测精度,能够检测出占原始电路规模0.04%的硬件木马。     

Automatic Feature Selection of Hardware Layout: A Step toward Robust Hardware Trojan Detection

Recently, the problem of hardware Trojan detection has gained a tangible significance in academia and industry. That problem, by its nature, is complex, time consuming and error prone due to design and fabrication outsourcing of hardware circuits to external untrusted foundries. Researchers have proposed different approaches, either destructive or non-destructive, to overcome that problem. The destructive approach depends on reverse engineering via decapsulation, delayering and layout identification. This paper presents a first trial of a new approach that can afford an automatic and robust solution for the step of layout identification. The proposed technique takes the underlying digital circuit as input, and automatically determines its basic features using Haar feature extractor. Based on that features, a decision tree is trained to act as a weak classifier, which is later boosted, by making use of AdaBoost learning algorithm, to produce a strong classifier in a chain of cascaded classifiers. Accordingly, a classification model is built up to provide an automatic hardware Trojan location and detection tool. To evaluate the proposed model, ISCAS89 benchmark dataset was used for training and testing. The hardware dataset has been altered deliberately to show different Trojan examples –namely, Trojan insertion, Trojan deletion and Trojan parametric- inside hardware circuits. By investigating the underlying experimental results, the capabilities of the proposed model are evaluated, and the evaluation shows that the approach can detect different hardware Trojan types in different circuit layouts, with high accuracy rate. The proposed approach is not only automatic, but also robust and promising.     

Two Countermeasures Against Hardware Trojans Exploiting Non-Zero Aliasing Probability of BIST

The threat of hardware Trojans has been widely recognized by academia, industry, and government agencies. A Trojan can compromise security of a system in spite of cryptographic protection. The damage caused by a Trojan may not be limited to a business or reputation, but could have a severe impact on public safety, national economy, or national security. An extremely stealthy way of implementing hardware Trojans has been presented by Becker et al. at CHES’2012. Their work have shown that it is possible to inject a Trojan in a random number generator compliant with FIPS 140-2 and NIST SP800-90 standards by exploiting non-zero aliasing probability of Logic Built-In-Self-Test (LBIST). In this paper, we present two methods for modifying LBIST to prevent such an attack. The first method makes test patterns dependent on a configurable key which is programed into a chip after the manufacturing stage. The second method uses a remote test management system which can execute LBIST using a different set of test patterns at each test cycle.     

On malicious implants in PCBs throughout the supply chain

The PCB supply chain has become globally distributed such that PCBs are vulnerable to hardware Trojan attacks. Moreover, attacks on PCBs are possible even after a system is deployed. Various countermeasures have been proposed and efforts to develop board-level Trojan benchmarks are underway, but IC Trojan taxonomies do not capture important characteristics of PCB implants. This work surveys existing PCB countermeasures and examples of board-level Trojans to inform a new taxonomy suited for PCB Trojans. Our taxonomy reflects practically significant characteristics of board-level Trojans to guide development of board-level countermeasures and fair, comprehensive benchmark suites.     

基于温度传感器的硬件木马检测方法

针对硬件木马检测的旁路信号分析法中需要黄金模型、受工艺扰动影响大的问题,提出了一种基于温度传感器的硬件木马检测方法。采用抗工艺扰动设计使温度传感器受工艺扰动的影响程度低。将温度传感器植入芯片内部相似结构(存储单元、功能相同的模块等),读取温度传感器的频率信息,通过简单异常值分析法与差值分析法比对相似结构的频率差异,实现了硬件木马的检测。该方法既有效克服了工艺扰动的影响,又不需要黄金模型。温度传感器输出频率在最极端工艺角下的工艺扰动仅为9%。在SMIC 180 nm CMOS工艺下对高级加密标准(AES)电路的木马检测进行了验证,结果验证了该方法的有效性。     

一种木马电路的实现与特征分析

由于硬件木马等恶意电路的隐蔽性,攻击者可以利用其窃取机密信息,破坏硬件电路,造成严重的经济损失与社会危害.本文基于典型的芯片设计流程与EDA工具,首先建立硬件木马的电路模型,然后尝试在一简单ADC芯片中,利用其电路的剩余空间,设计实现了一种计数器木马电路.该木马电路的规模大约占芯片总面积的5.6%,将受污染的电路与真实电路一起用标准CMOS工艺HJ0.25μm流片,然后采用旁路功耗分析技术进行深入分析.实验数据表明,在正常工作情况下,受污染和没受污染的芯片功耗并无明显差异,而当木马触发条件满足时,受污染的芯片却成功的实现了攻击.