Surface‐Modified High‐k Oxide Gate Dielectrics for Low‐Voltage High‐Performance Pentacene Thin‐Film Transistors

In this study, pentacene thin‐film transistors (TFTs) operating at low voltages with high mobilities and low leakage currents are successfully fabricated by the surface modification of the CeO₂–SiO₂ gate dielectrics. The surface of the gate dielectric plays a crucial role in determining the performance and electrical reliability of the pentacene TFTs. Nearly hysteresis‐free transistors are obtained by passivating the devices with appropriate polymeric dielectrics. After coating with poly(4‐vinylphenol) (PVP), the reduced roughness of the surface induces the formation of uniform and large pentacene grains; moreover, –OH groups on CeO₂–SiO₂ are terminated by C₆H₅, resulting in the formation of a more hydrophobic surface. Enhanced pentacene quality and reduced hysteresis is observed in current–voltage (I–V) measurements of the PVP‐coated pentacene TFTs. Since grain boundaries and –OH groups are believed to act as electron traps, an OH‐free and smooth gate dielectric leads to a low trap density at the interface between the pentacene and the gate dielectric. The realization of electrically stable devices that can be operated at low voltages makes the OTFTs excellent candidates for future flexible displays and electronics applications.     

Enhancement of Interconnectivity in the Channels of Pentacene Thin‐Film Transistors and Its Effect on Field‐Effect Mobility

With the aim of improving the field‐effect mobility of transistors by promoting the interconnectivity of the grains in pentacene thin films, deposition conditions of the pentacene molecules using one‐step (total thickness of layer 50 nm: 0.1 Å s^–1) and two‐step (first layer 10 nm: 0.1 Å s^–1, second layer 40 nm: 4.0 Å s^–1) depositions are controlled. Significantly, it is found that the continuities of the pentacene thin films vary with the deposition conditions of the pentacene molecules. Specifically, a smaller number of voids is observed at the interface for the two‐step deposition, which results in field‐effect mobilities as high as 1.2 cm² V^–1 s^–1; these are higher by more than a factor of two than those of the pentacene films deposited in one step. This remarkable increase in field‐effect mobility is due in particular to the interconnectivity of the pentacene grains near the insulator substrate.     

An Organic Thin‐Film Transistor with a Photoinitiator‐Free Photosensitive Polyimide as Gate Insulator

This investigation deals with the synthesis and detailed study of a photoinitiator‐free photosensitive polyimide gate insulator for organic thin‐film transistors (OTFTs), one of the most important components of active‐matrix displays on plastic substrates. The photosensitive polyimide precursor poly(amic acid) is prepared from the aromatic dianhydride 3,3′,4,4′‐benzophenone tetracarboxylic dianhydride (BTDA) and the novel aromatic diamine 7‐(3,5‐diaminobenzoyloxy)coumarine (DACM). The photosensitivity of the poly(amic acid) film is investigated using a high‐pressure mercury lamp at 280–310 nm. The pattern resolution of the photocured film was about 50 μm. The surface morphology of the films before and after the photopatterning process is also investigated. In addition, we have fabricated pentacene OTFTs with the photoinitiator‐free photosensitive polyimide as gate insulator. The OTFT characteristics are discussed in more detail with respect to the electrical properties of the photosensitive polyimide thin film.     

Influence of Electric Field on Microstructures of Pentacene Thin‐Films in Field‐Effect Transistors

We report on electric‐field‐induced irreversible structural modifications in pentacene thin films after long‐term operation of organic field‐effect transistor (OFET) devices. Micro‐Raman spectroscopy allows for the analysis of the microstructural modifications of pentacene in the small active channel of OFET during device operation. The results suggest that the herringbone packing of pentacene molecules in a solid film is affected by an external electric field, particularly the source‐to‐drain field that parallels the a–b lattice plane. The analysis of vibrational frequency and Davydov splitting in the Raman spectra reveals a singular behavior suggesting a reduced separation distance between pentacene molecules after long‐term operations and, thus, large intermolecular interactions. These results provide evidence for improved OFET performance after long‐term operation, related to the microstructures of organic semiconductors. It is known that the application of large electric fields alters the semiconductor properties of the material owing to the generation of defects and the trapping of charges. However, we first suggest that large electric fields may alter the molecular geometry and further induce structural phase transitions in the pentacene films. These results provide a basis for understanding the improved electronic properties in test devices after long‐term operations, including enhanced field‐effect mobility, improved on/off current ratio, sharp sub‐threshold swing, and a slower decay rate in the output drain current. In addition, the effects of source‐to‐drain electric field, gate electric field, current and charge carriers, and thermal annealing on the pentacene films during OFET operations are discussed.     

Orders‐of‐Magnitude Reduction of the Contact Resistance in Short‐Channel Hot Embossed Organic Thin Film Transistors by Oxidative Treatment of Au‐Electrodes

In this study we report on the optimization of the contact resistance by surface treatment in short‐channel bottom‐contact OTFTs based on pentacene as semiconductor and SiO₂ as gate dielectric. The devices have been fabricated by means of nanoimprint lithography with channel lengths in the range of 0.3 μm < L < 3.0 μm. In order to reduce the contact resistance the Au source‐ and drain‐contacts were subjected to a special UV/ozone treatment, which induced the formation of a thin AuO_x layer. It turned out, that the treatment is very effective (i) in decreasing the hole‐injection barrier between Au and pentacene and (ii) in improving the morphology of pentacene on top of the Au contacts and thus reducing the access resistance of carriers to the channel. Contact resistance values as low as 80 Ω cm were achieved for gate voltages well above the threshold. In devices with untreated contacts, the charge carrier mobility shows a power‐law dependence on the channel length, which is closely related to the contact resistance and to the grain‐size of the pentacene crystallites. Devices with UV/ozone treated contacts of very low resistance, however, exhibit a charge carrier mobility in the range of 0.3 cm² V^–1 s^–1 < μ < 0.4 cm² V^–1 s^–1 independent of the channel length.     

Inside Front Cover: High‐Performance and Stable Organic Thin‐Film Transistors Based on Fused Thiophenes (Adv. Funct. Mater. 3/2006)

A series of new organic semiconductors for organic thin‐film transistors using dithieno[3,2‐b:2′,3′‐d]thiophene as the core have been synthesized. In work reported by Liu, Zhu, and co‐workers on p. 426, the phenyl‐substituted compound exhibited a high mobility of 0.42 cm² V^–1 s^–1 and an on/off ratio of 5 × 10⁶. Weekly shelf‐life tests of the transistors based on the bis(diphenyl)‐substituted thiophene under ambient conditions showed that the mobility was almost unchanged after more than two months, demonstrating potential for applications in future organic electronics. A series of new organic semiconductors for organic thin‐film transistors (OTFTs) using dithieno[3,2‐b:2′,3′‐d]thiophene as the core are synthesized. Their electronic and optical properties are investigated using scanning electron microscopy (SEM), X‐ray diffraction (XRD), UV‐vis and photoluminescence spectroscopies, thermal gravimetric analysis (TGA), and differential scanning calorimetry (DSC). The compounds exhibit an excellent field‐effect performance with a high mobility of 0.42 cm² V^–1 s^–1 and an on/off ratio of 5 × 10⁶. XRD patterns reveal these films, grown by vacuum deposition, to be highly crystalline, and SEM reveals well‐interconnected, microcrystalline domains in these films at room temperature. TGA and DSC demonstrate that the phenyl‐substituted compounds possess excellent thermal stability. Furthermore, weekly shelf‐life tests (under ambient conditions) of the OTFTs based on the phenyl‐substituted compounds show that the mobility for the bis(diphenyl)‐substituted thiophene was almost unchanged for more than two months, indicating a high environmental stability.     

Stable organic static random access memory from a roll-to-roll compatible vacuum evaporation process

An organic Static Random Access Memory (SRAM) based on p-type, six-transistor cells is demonstrated. The bottom-gate top-contact thin film transistors composing the memory were fabricated on flexible polyethylene naphthalate substrates. All metallization layers and the p-type semiconductor dinaphtho[2,3-b:2',3'-f] thieno[3,2-b]thiophene were deposited by thermal evaporation. The gate dielectric was deposited in a vacuum roll-to-roll environment at a web speed of 25 m/min by flash-evaporation and subsequent plasma polymerisation of tripropyleneglycol diacrylate (TPGDA). Buffering the TPGDA with a polystyrene layer yields hysteresis-free transistor characteristics with turn-on voltage close to zero. The static transfer characteristic of diode-connected load inverters were also hysteresis-free with maximum gain >2 and noise margin ∼2.5 V. When incorporated into SRAM cells the time-constant for writing data into individual SRAM cells was less than 0.4 ms. Little change occurred in the magnitude of the stored voltages, when the SRAM was powered continuously from a −40 V rail for over 27 h testifying to the electrical stability of the threshold voltage of the individual transistors. Unencapsulated SRAM cells measured two months after fabrication showed no significant degradation after storage in a clear plastic container in normal laboratory ambient.     

High‐Performance and Stable Organic Thin‐Film Transistors Based on Fused Thiophenes

A series of new organic semiconductors for organic thin‐film transistors (OTFTs) using dithieno[3,2‐b:2′,3′‐d]thiophene as the core are synthesized. Their electronic and optical properties are investigated using scanning electron microscopy (SEM), X‐ray diffraction (XRD), UV‐vis and photoluminescence spectroscopies, thermal gravimetric analysis (TGA), and differential scanning calorimetry (DSC). The compounds exhibit an excellent field‐effect performance with a high mobility of 0.42 cm² V^–1 s^–1 and an on/off ratio of 5 × 10⁶. XRD patterns reveal these films, grown by vacuum deposition, to be highly crystalline, and SEM reveals well‐interconnected, microcrystalline domains in these films at room temperature. TGA and DSC demonstrate that the phenyl‐substituted compounds possess excellent thermal stability. Furthermore, weekly shelf‐life tests (under ambient conditions) of the OTFTs based on the phenyl‐substituted compounds show that the mobility for the bis(diphenyl)‐substituted thiophene was almost unchanged for more than two months, indicating a high environmental stability.     

High‐Resolution Characterization of Pentacene/Polyaniline Interfaces in Thin‐Film Transistors

We present the first detailed report that directly correlates the reduced contact resistance in organic thin‐film transistors (TFTs) with fundamental structural and morphological characterization at the organic semiconductor/conducting polymer interface. Specifically, the pentacene grains are similar in size and continuous across the channel/electrode interface in bottom‐contact TFTs with polyaniline (PANI) electrodes. On a molecular level, the fused rings of pentacene are oriented perpendicular to the surface both in the channel and on PANI. Accordingly, the contact resistance is small in such devices. In TFTs with gold electrodes, however, the pentacene grains are different in size and are discontinuous across the channel/electrode interface. Further, the fused rings of pentacene are oriented perpendicular to the channel surface and parallel to the gold surface. Such differences across the channel/electrode interface lead to structural and electronic disorder, which manifests itself as a significantly larger contact resistance in devices with gold electrodes.     

Modeling Polymer Dielectric/Pentacene Interfaces: On the Role of Electrostatic Energy Disorder on Charge Carrier Mobility

Force‐field and quantum‐chemical calculations are combined to model the packing of pentacene molecules at the atomic level on two polymer dielectric layers (poly(methyl methacrylate) (PMMA) versus polystyrene (PS)) widely used in field‐effect transistors and to assess the impact of electrostatic interactions at the interface on the charge mobility values in the pentacene layers. The results show unambiguously that the electrostatic interactions introduce a significant energetic disorder in the pentacene layer in contact with the polymer chains; a drop in the hole mobility by a factor of 5 is predicted with PS chains while a factor of 60 is obtained for PMMA due to the presence of polar carbonyl groups.     

Printable Single‐Crystal Silicon Micro/Nanoscale Ribbons,Platelets and Bars Generated from Bulk Wafers

This article demonstrates a method for fabricating high quality single‐crystal silicon ribbons, platelets and bars with dimensions between ～ 100 nm and ～ 5 cm from bulk (111) wafers by using phase shift and amplitude photolithographic methods in conjunction with anisotropic chemical etching procedures. This “top‐down” approach affords excellent control over the thicknesses, lengths, and widths of these structures and yields almost defect‐free, monodisperse elements with well defined doping levels, surface morphologies and crystalline orientations. Dry transfer printing these elements from the source wafers to target substrates by use of soft, elastomeric stamps enables high yield integration onto wafers, glass plates, plastic sheets, rubber slabs or other surfaces. As one application example, bottom gate thin‐film transistors that use aligned arrays of ribbons as the channel material exhibit good electrical properties, with mobilites as high as ～ 200 cm² V^–1 s^–1 and on/off ratios > 10⁴.     

Comparison of Charge‐Carrier Transport in Thin Films of Spiro‐Linked Compounds and Their Corresponding Parent Compounds

The charge‐transport properties of the spiro‐linked compounds 2,2′,7,7′‐tetrakis(diphenylamino)‐9,9′‐spirobifluorene, 2,2′,7,7′‐tetrakis(N,N′‐di‐p‐methylphenylamino)‐9,9′‐spirobifluorene, 2,2′,7,7′‐tetra(m‐tolyl‐phenylamino)‐9,9′‐spirobifluorene, and 2,2′,7,7′‐tetra(N‐phenyl‐1‐naphthylamine)‐9,9′‐spirobifluorene, and their corresponding parent compounds, N,N,N′,N′‐tetraphenylbenzidine, N,N,N′,N′‐tetrakis(4‐methylphenyl)benzidine, and N,N′‐bis(3‐methylphenyl)‐(1,1′‐biphenyl)‐4,4′‐diamine, N,N′‐diphenyl‐N,N′‐bis(1‐naphthyl)‐1,1′‐biphenyl‐4,4′‐diamine, are investigated. The field‐effect mobilities of charge carriers in thin films of the parent compounds are slightly higher than those of the spiro‐linked compounds. However, the transistor action of the parent‐compound thin films vanishes because the films crystallize after being stored in ambient atmosphere for a few days. In contrast, the hole mobilities in thin films of the spiro‐linked compounds do not change significantly after the samples are stored in ambient atmosphere for up to nine months. Also discussed is the temperature dependency of the mobilities of charge carriers, which is presented using two models, namely the Arrhenius and the Gaussian disorder models.     

A Review of Vertical Organic Transistors

Powerful electronic devices require performant short‐channel transistors. For organic electronics, though, promising low‐cost and flexible electronic circuits, high processing costs for short channel devices are not acceptable. In this regard, vertical organic transistors (VOTs) are an attractive alternative, and in fact, today they reach the highest transition frequency (40 MHz) and the highest footprint current density (>1 MA cm^?2) among all organic transistors. Here, all VOT concepts are reviewed, while discussing device physics, integration approaches, and highlighting the recent developments. The upcoming challenges for the VOT technology are also presented with a guideline for further developments.     

Vapor Phase Growth of Functional Pentacene Films at Atmospheric Pressure

Compared to traditional vacuum evaporation techniques for small organic molecules, organic vapor phase deposition (OVPD) possesses a extra processing parameter: the pressure of process gas P_ch. Here, the influence of large P_ch variations (from 0.1 mbar to atmospheric pressure) on pentacene thin film growth is explored. OVPD operation at higher P_ch is characterized by lower carrier gas velocities and lower organic diffusivities. These result in an invariance of the material utilization efficiency over the entire pressure span and in an advantageous equilibrium evaporation regime in the source. An increase in P_ch yields rough pentacene layers. Classical nucleation theory is applied to demonstrate how the pressure rise triggers homogeneous nucleation in the gas phase, causing the observed roughening. The use of lower deposition rates, higher dilution flow rates, and higher substrate temperatures result in the suppression of gas phase nucleation and the growth of smooth pentacene films at atmospheric pressure. Using these optimized conditions, state‐of‐the‐art pentacene thin film transistors with saturation mobilities above 0.9 cm²/Vs are reproducibly fabricated. p‐Type circuits are also made and a 19‐stage ring oscillator with a stage delay of 51 μs at a supply voltage of 15 V is demonstrated.     

High‐Performance,Low‐Operating‐Voltage Organic Field‐Effect Transistors with Low Pinch‐Off Voltages

Organic field‐effect transistors suffer from ultra‐high operating voltages in addition to their relative low mobility. A general approach to low‐operating‐voltage organic field‐effect transistors (OFETs) using donor/acceptor buffer layers is demonstrated. P‐type OFETs with acceptor molecule buffer layers show reduced operating voltages (from 60–100 V to 10–20 V), with mobility up to 0.19 cm² V^?1 s^?1 and an on/off ratio of 3 × 10⁶. The subthreshold slopes of the devices are greatly reduced from 5–12 V/decade to 1.68–3 V/decade. This favorable combination of properties means that such OFETs can be operated successfully at voltages below 20 V (|V_DS| ≤ 20 V, |V_GS| ≤ 20 V). This method also works for n‐type semiconductors. The reduced operating voltage and low pinch‐off voltage contribute to the improved ordering of the polycrystalline films, reduced grain boundary resistance, and steeper subthreshold slopes.     

Interface Engineering for Organic Electronics

The field of organic electronics has been developed vastly in the past two decades due to its promise for low cost, lightweight, mechanical flexibility, versatility of chemical design and synthesis, and ease of processing. The performance and lifetime of these devices, such as organic light‐emitting diodes (OLEDs), photovoltaics (OPVs), and field‐effect transistors (OFETs), are critically dependent on the properties of both active materials and their interfaces. Interfacial properties can be controlled ranging from simple wettability or adhesion between different materials to direct modifications of the electronic structure of the materials. In this Feature Article, the strategies of utilizing surfactant‐modified cathodes, hole‐transporting buffer layers, and self‐assembled monolayer (SAM)‐modified anodes are highlighted. In addition to enabling the production of high‐efficiency OLEDs, control of interfaces in both conventional and inverted polymer solar cells is shown to enhance their efficiency and stability; and the tailoring of source–drain electrode–semiconductor interfaces, dielectric–semiconductor interfaces, and ultrathin dielectrics is shown to allow for high‐performance OFETs.     

Insulator Polarization Mechanisms in Polyelectrolyte‐Gated Organic Field‐Effect Transistors

Electrolyte‐gated organic field‐effect transistors (OFETs) hold promise for robust printed electronics operating at low voltages. The polarization mechanism of thin solid electrolyte films, the gate insulator in such OFETs, is still unclear and appears to limit the transient current characteristics of the transistors. Here, the polarization response of a thin proton membrane, a poly(styrenesulfonic acid) film, is controlled by varying the relative humidity. The formation of the conducting transistor channel follows the polarization of the polyelectrolyte, such that the drain transient current characteristics versus the time are rationalized by three different polarization mechanisms: the dipolar relaxation at high frequencies, the ionic relaxation (migration) at intermediate frequencies, and the electric double‐layer formation at the polyelectrolyte interfaces at low frequencies. The electric double layers of polyelectrolyte capacitors are formed in ～1 µs at humid conditions and an effective capacitance per area of 10 µF cm^?2 is obtained at 1 MHz, thus suggesting that this class of OFETs might operate at up to 1 MHz at 1 V.     

Organic Light Emitting Field Effect Transistors: Advances and Perspectives

Light emitting field effect transistors based on molecular and polymeric organic semiconductors are multifunctional devices that integrate light emission with the current modulating function of a transistor. The planar geometry of organic light emitting field effect transistors (OLEFETs) offers direct access to the light emission region, providing a unique experimental configuration to investigate fundamental optical and electronic properties in organic semiconductors. OLEFETs show great potential for technological applications such as active matrix full color electroluminescent displays. In this Feature Article we review advances in OLEFETs since their first demonstration in 2003 and we highlight exciting challenges associated with their future development.     

Low‐Voltage,High‐Performance Organic Field‐Effect Transistors with an Ultra‐Thin TiO2 Layer as Gate Insulator

We report on our latest improvements in organic field‐effect transistors (OFETs) using ultra‐thin anodized gate insulators. Anodization of titanium (Ti) is an extremely cheap and simple technique to obtain high‐quality, very thin (～ 7.5 nm), pinhole‐free, and robust gate insulators for OFETs. The anodized insulators have been tested in transistors using pentacene and poly(triarylamine) (PTAA) as active layers. The fabricated devices display low‐threshold, normally “off” OFETs with negligible hysteresis, good carrier mobility, high gate capacitance, and exceptionally low inverse subthreshold slope. Device performance is improved via chemical modification of TiO₂ with an octadecyltrichlorosilane (OTS) self‐assembled monolayer (SAM). As the result of this combination of favorable properties, we have demonstrated OFETs that can be operated with voltages well below 1 V.