0.5~2.7 GHz GaAs超宽带多功能MMIC芯片设计

基于0.25μm GaAs增强/耗尽型(E/D模)赝配高电子迁移率晶体管(PHEMT)工艺,设计并实现了一款集成了并行驱动器的多功能单片微波集成电路(MMIC)芯片。该芯片的移相器采用磁耦合全通网络(MCAPN)结构,功率分配器则使用集总元件进行集成,不仅缩小了芯片面积,并且在超宽带下实现了较好的相位精度和幅度一致性。采用微波探针台对芯片进行在片测试,结果表明在0.5~2.7 GHz,芯片性能良好:其小信号RF输入功率为0 dBm,芯片的插入损耗不大于7 dB,幅度波动在±0.8 dB以内,相位差为-98°~-85°,输入电压驻波比(VSWR)不大于1.9∶1,输出VSWR不大于1.9∶1,在-5 V电源下驱动器的静态电流为1 mA,响应速度为25 ns。芯片尺寸为3.4 mm×1.8 mm。该电路具有响应速度快、功耗低、集成度高等特点,可应用于多波束天线系统中。     

GaAs PHEMT工艺V波段有源二倍频器MMIC

基于标准GaAs赝配高电子迁移率晶体管(PHEMT)工艺,设计了一个输出频率在V波段的有源二倍频器单片微波集成电路(MMIC),实现了高输出功率和良好的谐波抑制特性.芯片内部集成了180°马逊巴伦、对管变频和输出功率放大器等电路.重点优化设计了马逊巴伦的版图结构,在宽带内具有良好的相位和幅度特性;分析了对管变频结构电路的原理,确定其最佳工作电压在压断电压附近;设计了V波段两级放大器电路,对带内信号放大的同时抑制了带外谐波信号,提高了整个倍频器的输出功率.芯片采用微波探针台在片测试,在外加3.5V电源电压下的工作电流为147 mA;输入功率为14 dBm时,在55～ 65 GHz输出带宽内的输出功率为13 dBm;带内基波抑制大于20 dBc,芯片面积为2.1 mm×1.3 mm.此倍频器MMIC可应用于V波段通信系统和微波测量系统.     

Ku波段6bit数字衰减器MMIC的小型化设计

基于0.25μm GaAs增强/耗尽(E/D)型赝配高电子迁移率晶体管(PHEMT)工艺,设计并实现了一款集成了6 bit并行驱动器的数字衰减器单片微波集成电路(MMIC)。该衰减器采用T型衰减网络结构,不仅缩小了芯片面积,并且可实现较好的衰减精度和衰减附加相移。芯片在片测试结果表明,在-5 V电源电压下驱动器的静态电流为1.8 mA,响应速度为25 ns。在9~18 GHz频率范围内,衰减器芯片的插入损耗不大于3.6 dB,均方根衰减精度不大于0.7 dB,衰减附加相移为-2°~4°,输入电压驻波比(VSWR)不大于1.25∶1,输出VSWR不大于1.5∶1。芯片尺寸为1.6 mm×0.6 mm×0.1 mm。该电路具有响应速度快、功耗低、面积小、衰减附加相移小等优点,可广泛应用于通信设备和微波测量系统中。     

一种适用于高速串行数据通信的发送器

介绍了一种采用深亚微米CMOS工艺实现的单片集成发送器的设计.该发送器适用于高速串行硬盘接口,主要由时钟发生器、并串转换电路和片内阻抗匹配的线驱动器三大模块组成.发送器采用0 .18μm六层金属单层多晶N阱CMOS工艺实现,芯片面积1.3mm×0 .78mm .测试结果表明时钟发生器可工作在1.5 GHz的频率下,数据可以正常发送.发送器总体功耗为95 m W,输出共模电平2 70 m V ,单端输出幅度2 70 m V.     

基于RC-CR多相网络的镜频抑制接收机MMIC

基于RC-CR多相网络技术研制了一款S波段镜频抑制接收机单片微波集成电路(MMIC),在MMIC芯片上集成S波段低噪声放大器(LNA)、差分IQ混频器、本振(LO)驱动放大器、RC-CR多相网络滤波器等电路单元,实现了S波段单片镜频抑制接收机,解决了镜频接收机小型化的问题.电路、电磁场软件仿真以及采用GaAs赝配高电子迁移率晶体管(PHEMT)工艺流片后的结果表明,在S波段实现了噪声系数小于1.8 dB,增益大于12 dB,中频(150±5) MHz带内镜频抑制大于35 dBc的技术指标.MMIC的芯片尺寸为4.8 mn×2.5 mm×0.07 mm.此镜频抑制接收机MMIC具有指标优异、体积小、集成度高的特点,可广泛用于各种需小型化的相控阵雷达和通信系统中.     

S波段平衡式限幅MMIC低噪声放大器设计

结合混合微波集成电路(HMIC)工艺和砷化镓单片微波集成电路(MMIC)工艺各自优势,设计制作了一款小型化大功率S波段平衡式限幅MMIC低噪声放大器.采用平衡式结构,提高了限幅功率容量和可靠性.由于金丝键合线的等效电感具有更高Q值,低噪声放大器单片的输入匹配采用外部金丝键合线匹配,有效降低了低噪声放大器单片的噪声系数.限幅器采用混合集成工艺制成,能够耐受较大功率.利用微波仿真软件,设计制作了兰格(Lange)电桥、限幅电路和低噪声放大器输入匹配等电路.最终产品尺寸仅为22 mm×16 mm×6 mm,在2.7～3.5 GHz内增益27 ～ 28 dB,噪声系数小于1.3 dB,驻波比小于1.3,该平衡限幅MMIC低噪声放大器可承受功率超过200 W、占空比为15％的脉冲功率冲击.     

一种适用于高速串行数据通信的发送器

介绍了一种采用深亚微米CMOS工艺实现的单片集成发送器的设计.该发送器适用于高速串行硬盘接口,主要由时钟发生器、并串转换电路和片内阻抗匹配的线驱动器三大模块组成.发送器采用0.18μm六层金属单层多晶N阱CMOS工艺实现,芯片面积1.3mm×0.78mm.测试结果表明时钟发生器可工作在1.5GHz的频率下,数据可以正常发送.发送器总体功耗为95mW,输出共模电平270mV,单端输出幅度270mV.     

W波段三路合成GaN功率放大器MMIC

基于GaNHEMT工艺,研制了一款W波段功率放大器MMIC.利用Lange耦合器将3个饱和输出功率大于1 W的单元电路进行三路片上功率合成来实现该功率放大器MMIC.该芯片的制作采用了 0.1 μm T型栅GaN HEMT技术,衬底为50 μm厚的SiC.芯片为三级级联拓扑结构,采用高低阻抗传输线、介质电容等进行匹配和偏置电路设计,实现低损耗输出,芯片尺寸为3.37 mm×3.53 mm×0.05 mm.测试结果表明,在漏源工作电压15 V、88～92 GHz频率范围内,该MMIC的线性增益大于15 dB,饱和输出功率大于3W.该MMIC具有功率大、输入输出回波损耗小及应用范围广的优势.     

C波段紧凑型25 W GaN宽带功率放大器

基于0.25 μm GaN工艺和以SiC为衬底的高电子迁移率晶体管(HEMT)技术,采用电抗匹配、优化电路的静态直流工作点、三级放大结构栅宽比1:3.6:16等措施,保证电路的增益和功率指标,实现了C波段高功率、高增益和高效率的宽带单片微波集成电路(MMIC)放大器。芯片测试结果表明,在4~8 GHz频率范围内,漏极电压28 V,连续波条件下,放大器的小信号增益大于30 dB,大信号增益大于23 dB,饱和输出功率大于44 dBm,功率附加效率为38%~45%。该单片放大器芯片尺寸为3.6 mm×4.0 mm。     

微波、毫米波GaN HEMT与MMIC的新进展(续)

3 MMIC技术 在芯片上由GaN HEMT有源器件和无源元件(如MIM电容、薄膜电阻和衬底上的通孔等)所组成的微波单片集成电路(MMIC)和GaN HEMT分立晶体管几乎同步发展,MMIC技术的发展使GaNHEMT器件的电路应用能减少体积和质量,适应高频率的需求和批量生产.目前4英寸(1英寸=2.54 cm)圆片级GaN MMIC加工线已经成熟,GaN MMIC的工作频率已覆盖微波到3 mm波段,GaN MMIC的性能向高效率、高功率、宽频带和多功能集成的方向发展.     

Interfacial reaction and shear strength of SnAgCu-xNi/Ni solder joints during aging at 150 °C

The interfacial microstructure and shear strength of Sn3.8Ag0.7Cu-xNi (SAC-xNi, x = 0.5, 1, and 2) composite solders on Ni/Au finished Cu pads were investigated in detail after aging at 150 °C for up to 1000 h. The interfacial characteristics of composite solder joints were affected significantly by the weight percentages of added Ni micro-particles and aging time. After aging for 200 h, the solder joints of SAC, SAC-0.5Ni and -1Ni presented duplex intermetallic compound (IMC) layers regardless of the initial interfacial structure on as-reflowed joints, whose upper and lower IMC layers were comprised of (CuNi)₆Sn₅ and (NiCu)₃Sn₄, respectively. Only a single (NiCu)₃Sn₄ IMC layer was ever observed at the SAC-2Ni/Ni interface on whole aging process. Based on the compositional analysis, the amount of Ni within the IMC regions increased as the proportion of Ni addition increased. The IMC (NiCu)₃Sn₄ layer thickness on the interface of SAC and SAC-0.5Ni grew more slowly when compared to that of SAC-1Ni and -2Ni, while for the (CuNi)₆Sn₅ layer the reverse is true. Except the IMCs sizes are increased with increased aging time, the interfacial IMCs tended to transfer their morphologies to polyhedra. In all composite joints testing, the shear strengths were approximately equal to non-composite joints. The fracturing observed during shear testing of composite joints occurred in the bulk solder, indicating that the SAC-xNi/Ni solder joints had a desirable joint reliability.     

有机发光二极管中ADN掺杂ErQ的1.54μm电致发光

自行设计了基于8-羟基喹啉铒(ErQ)为发射层(EMLs)和二硝酰胺铵(ADN)为蓝光主体材料的近红外有机发光二级管.器件的基本结构为(p-Si/NPB/EML/Bphen/Bphen:Cs2CO3/Sm/Au),设计并比较了三套不同发射层结构(ErQ/ADN为双层结构器件,(ErQ/ADN)×3为多层结构器件,ErQ:ADN为掺杂结构器件)的器件.三组器件在一定的偏压下,均可发出1.54μm的光,对应三价铒离子4I13/2→4I15/2的跃迁.其中,ADN:ErQ(1∶1)掺杂结构的近红外电致发光强度是ADN/ErQ双层结构中的三倍.此外,不同掺杂浓度的ADN:ErQ复合膜做了以下表征:吸收谱、光致发光谱和荧光寿命谱.实验结果证实了在近红外电致发光过程中存在从ADN主体分子到ErQ发射分子的高效率的能量转移.     

BNBST无铅压电陶瓷的制备工艺研究

设计了（Bi0.55Na0.5）1-X（BaaSrb）xTiO3（BNBST[100x-100a／100b]）无铅压电陶瓷新体系。该体系压电陶瓷具有工艺特性及压电响应好，压电常数高的特点，且有实际应用前景的新型压电陶瓷材料体系。采用传统的陶瓷工艺制备了（Bi0.55Na0.5）1-X（BaaSrb）xTiO3无铅压电陶瓷，研究了制备工艺参数对其物化结构性能的影响。生料的热重-差热（TGA-DTA）分析表明，粉料合成过程中，先是SrTiO3、BaTiO3的形成，然后是（Bi0．5Na0．5）Tio，的形成，同时三者形成固溶体；密度测试表明，陶瓷的体积密度随烧结温度的升高而增大，可较易获得理论密度94％的陶瓷；X-射线能谱分析（EDAX）研究表明，陶瓷的Bi、Na的挥发随着烧结温度的升高而加剧。研究结果表明，要制备性能优良的无铅压电陶瓷，需要精确控制制备工艺。     

Emerging interconnects: a state-of-the-art review and emerging solutions

Aluminium was a primary material for interconnection in integrated circuits (ICs) since their inception. Later, copper was introduced as interconnect material which has better metallic conductivity and resistance to electromigration. As the aggressive technology scaling continues, the copper resistivity increased because of size effects, which causes increase in delay, power dissipation and electromigration. The need to reduce the resistor-capacitor??????? delay, dynamic power utilisation and the crosstalk commotion is as of now the fundamental main impetus behind the presentation of new materials. The purpose of this paper is to do a survey of interconnect material used in IC from introduction of ICs to till date. This paper studies and reviews new materials available for interconnect application which are optical interconnects, carbon nanotube (CNT), graphene nanoribbons (GNRs) and silicon nanowires which are alternatives to copper. While doing a survey of interconnect material, it is found that multiwalled CNTs, multilayer GNR and mixed CNT bundles are promising candidates and are ultimate choice that can strongly address the problems faced by copper but on integration basis copper would last for coming years.     

钠离子对poly(dT).poly(dA).poly(dT)三螺旋DNA分子呼吸模式的影响

利用分子结构的螺旋对称性,建立了一个包括钠离子的三链DNA分子poly(dT)*poly(dA)*poly(dT)的晶格动力学模型,计算了poly(dT)*poly(dA)*poly(dT)的氢键呼吸模式.结果发现钠离子的加入明显地淬灭了位于较低频率的几个最为强烈的Hoogensteen氢键呼吸模式,而对Watson-Crick氢键呼吸模式影响不明显,这说明钠离子能提高poly(dT)*poly(dA)*poly(dT)三螺旋结构的稳定性.该计算结果很好地解释了poly(dT)*poly(dA)*poly(dT)的热融化实验.     

聚对苯撑苯并双(口恶)唑发光及其器件制备

采用光谱技术,研究了聚对苯撑苯并双(口恶)唑(PBO)溶液的光敏发光特性,并用相对法估算出溶液发光效率在50%范围.结合光谱技术、半导体电学和电化学等研究手段,具体研究了以PBO为发光层的单层电致发光器件,研究结果显示,电致发光与薄膜的光致发光有具有相同的发光中心,峰值位于510 nm左右.同时发现,由于存制备过程中不同处理条件使得不同厚度薄膜残留的掺杂物质浓度不同,从而引起薄膜的导电性的不同.使得器件的阈值场强随PBO厚度的减小而逐渐增加.     

人小肠粘膜免疫酶的定位研究—光镜和电镜免疫组织化学染色法

本文对免疫酶组织化学的样品制备程序和染色方法做了详细的阐述。用直接法、间接法和ABC法,对人小肠免疫酶的定位,进行了光镜和电镜的观察,染色阳性反应显著,获得了满意的效果。并对染色技巧做了分析和探讨。     

Arsenic deposition as a precursor layer on silicon (211) and (311) surfaces

We investigate the properties of arsenic (As) covered Si(211) and Si(311) surfaces by analyzing data from x-ray photoelectron spectroscopy (XPS) and low-energy electron diffraction (LEED) images. We then create a model using total surface energy calculations. It was found that both Si(211) and Si(311) had 0.68±0.08 surface As coverage. Si(211) had 0.28±0.04 Te coverage and Si(311) had 0.24±0.04 Te coverage. The Si(211) surface replaces the terrace and trench Si atoms with As for a lower surface energy, while the Si edge atoms form dimers. The Si(311) surface replaces all terrace atoms and adsorbs an As dimer every other edge site. These configurations imply an improvement in the mean migration path from the bare silicon surface by allowing the impinging atoms for the next epitaxial layer, tellurium (Te), to bind at every other pair of edge atoms, and not the step terrace sites. This would ensure a nonpolar, B-face growth.     

Joint estimation of TOA and DOA in IR-UWB system using a successive propagator method

Impulse radio ultra-wideband (IR-UWB) ranging and positioning require accurate estimation of time-of-arrival (TOA) and direction-of-arrival (DOA). With receiver of two antennas, both of the TOA and DOA parameters can be estimated via two-dimensional (2D) propagator method (PM), in which the 2D spectral peak searching, however, renders much higher computational complexity. This paper proposes a successive PM algorithm for joint TOA and DOA estimation in IR-UWB system to avoid 2D spectral peak searching. The proposed algorithm firstly gets the initial TOA estimates in the two antennas from the propagation matrix, then utilises successively one-dimensional (1D) local searches to achieve the estimation of TOAs in the two antennas, and finally obtains the DOA estimates via the difference in the TOAs between the two antennas. The proposed algorithm, which only requires 1D local searches, can avoid the high computational cost in 2D-PM algorithm. Furthermore, the proposed algorithm can obtain automatically paired parameters and has better joint TOA and DOA estimation performance than conventional PM algorithm, estimation of signal parameters via rotational invariance techniques algorithm and matrix pencil algorithm. Meanwhile, it has very close parameter estimation to that of 2D-PM algorithm. We have also derived the mean square error of TOA and DOA estimation of the proposed algorithm and the Cramer-Rao bound of TOA and DOA estimation in this paper. The simulation results verify the usefulness of the proposed algorithm.     

系统级封装新型埋入式电源滤波结构的研究

在高密度小尺寸的系统级封装(SiP)中,对供电系统的完整性要求越来越高,多芯片共用一个电源网路所产生的电压抖动除了会影响到芯片的正常工作,还会通过供电网路干扰到临近电路和其他敏感电路,导致芯片误动作,以及信号完整性和其他电磁干扰问题.这种电压抖动所占频带相当宽,几百MHz到几个GHz的中频电源噪声普通方法很难去除.结合埋入式电容和电源分割方法的特点,提出一种新型高性能埋入式电源低通滤波结构直接替代电源/地平面.研究表明,在0.65～4GHz的频带内隔离深度可达-40～75 dB,电源阻抗均在0.25ohm以下,实现了宽频高隔离度的高性能滤波作用.分别用电磁场和广义传输线两种仿真器模拟,高频等效电路模型分析这种低通滤波器的工作原理以及结构对隔离性能的影响,并进行了实验验证.