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The development of the Copernicus Architecture, a command, control, communications, computers, and intelligence (C4I) system, for the US Navy is discussed. The architecture is based on five thrusts uniting C4I form and function: replacement of equipment, new space and electronic warfare technologies, the use of combat centers, implementation of global indications and warning (I&W), and provides for tactical data exchanges. The system's support of space and electronic warfare and its solution to the central C4I problem in contingency operations, focusing a large number of sensors, often the entire national inventory in one area, are described 相似文献
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The combination of command, control, communications, computers and intelligence is known in the military as C4I. The naval C4I initiative is defining a future architecture that is based on information management with one objective in mind: to bring naval C4I to the next level of integration and interoperability in the joint war fighting arena for the advantages it brings to the warrior. We discuss the path we are taking to a more integrated C4I (IC4I) system. We also discuss what we have done to both define and bound the naval C4I universe; where we are on the path to the IC4I system; the challenges we face on our way; and how we intend to surmount them 相似文献
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Asakura M. Arimoto K. Hidaka H. Fujishima K. 《Solid-State Circuits, IEEE Journal of》1992,27(4):597-602
In low-voltage operating DRAMs, one of the most serious problems is how to maintain sufficient charge stored in the memory cell, which is concerned with the operating margin and soft error immunity. An array architecture called the cell-plate line connecting complementary bit-line (C3) architecture, which realizes a large signal voltage on the bit-line pair and low soft error rate (SER) without degrading the reliability of the memory cell capacitor dielectric film, is proposed. This architecture requires no unique process technology and no additional chip area. With the test device using the 16-Mb DRAM process, a 130-mV signal voltage is observed at 1.5-V power supply with 1.6-μm×3.2-μm cell size. This architecture should open the path for the future battery-backup and/or battery-operated high-density DRAMs 相似文献
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Several beat frequencies in the range below 6 GHz have been measured using a C12O2 16laser and a C12O2 18laser operating on several pairs of closely spaced lines in the 9.3-μm region. 相似文献
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连续波调频C~(18)O_2激光器用~(12)C~(18)O_2等气体作为工作物质。它的波长范围是8.9—10.9μm,而普通调频CO_2激光器的波长范围是9.1—11μm。调频C~(18)O_2激光器的绝大部分谱线落在普通调频CO_2激光器谱线的间隙处,而且还向短波方向移动了0.2μm。调频C~(18)O_2激光器的增益低于普通调频CO_2激光器的增益,但在已知的几种CO_2同位素(~(12)C~(18)O_2、 相似文献
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《IEE Review》1991,37(11):385-389
Coal-fired power stations provide some 40% of the world's electricity, making coal the prime fossil fuel for power generation. In 1989, world coal-fired capacity for electricity generation was over 800 GW, equivalent to an annual consumption of 1950 Mt. Here, however, the author details how coal's status as the dominant fuel for electricity generation is under threat, and describes, how, the coal industry is responding with a range of cleaner and more efficient combustion technologies 相似文献
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A sealed-off tunable CW C18O2 laser is reported. Its water-cooled discharge tube made of quartz has an inside diameter of 12 mm and a length of 1600 mm.
More than 80 lines are obtained and output of the strongest line was about 30W. 相似文献
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Colaitis M.-J. Jumpertz J.-L. Guerin B. Cheron B. Battini F. De Lescure B. Gautier E. Geffroy J.-P. 《Proceedings of the IEEE. Institute of Electrical and Electronics Engineers》1996,84(7):1019-1037
This paper provides a tutorial on the motivations, design, and applications of parallel processing applied to video real-time, illustrated by the experience gained in the implementation of the P3I machine. Its main purpose is to highlight the motivations for such a development the basic implementation choices, the major difficulties encountered and how they have been solved. Through these studies we found that parallel processing is well-suited to video real-time, when programmable implementations are considered. There are many outcomes of the P3I project, ranging from architectural considerations to parallel algorithms optimizations, and programming methodology. We want to emphasize three conclusions. First, programming an architecture composed of different parallel paradigms in a given architecture is tractable, and this heterogeneity is cost effective and efficient in terms of processing performances. Second, concerning the well known debate about how to match parallel architectures and image processing “levels” we conclude that the key is not to discuss Flynn's taxonomy (i.e., data versus tasks parallelism) but to consider how the parallelism grain evolves within a whole application. Third, we confirm that in the field of image processing, the efficiency of parallelism can only be gained if algorithms developers think “parallel”; this result seems to be obvious, but just consider the trends of recent RISC processors, embedding more and more parallelism, and claiming at a compatibility with existing sequential softwares 相似文献
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《IEE Review》1999,45(6):265-267
The author describes how small, fully anechoic chambers can be constructed at a fraction of the cost of traditional EMC facilities, and still provide an acceptable route to full-compliance testing for most equipment 相似文献
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Jong-Shik Kim Yu-Soo Choi Hoi-Jun Yoo Kwang-Seok Seo 《Solid-State Circuits, IEEE Journal of》1998,33(7):1096-1102
The 6F2 cell is widely known for its small area, but its sensing is unstable due to the large array noise. A new low-noise sensing scheme for a 6F2 DRAM cell is proposed, employing two noise reduction methods: the divided sense and combined restore scheme and the bit-line noise absorbing scheme. They can reduce word-line to bit-line as well as bit-line to bit-line coupling noises. The bit-line noise is reduced to 85% of that of a conventional scheme with only 0.05% area overhead, which is negligible compared to the area saving by using a 6F2 cell. The total chip area and the sensing time can he reduced to 85 and 87%, respectively, compared to conventional DRAM. A 2 kbit DRAM test chip with a 6F2 cell Is fabricated using 256 M DRAM technology, and its stable operations are confirmed 相似文献
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Books, scientific journals, Sci-Fi novels, and even educational TV shows speak to us of a new world where devices help people in everyday life by expanding our action and sensing capabilities. 相似文献
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《IEEE transactions on information theory / Professional Technical Group on Information Theory》1977,23(4):500-503
The question of the existence of nonplanar[M,n] group codes for the Gaussian channel has been settled except in the case ofn odd andM odd and composite. For this unsettled case, it is shown that the existence of a nonplanar[M,n] group code is implied by the existence of a groupG satisfying i)|G| is even, ii)G has a faithful complex irreducible representationT of the first kind, and iii)T restricted to the two-Sylow subgroup ofG contains the identity representation. A partial converse of this existence result is also given. Finally, it is shown that for each oddn not of the form2^{m} - 1 , there exists a nonplanar[M,n ] group code withM odd and composite. 相似文献
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A stabilization technique which will maintain a cleaved-coupled-cavity (C3) laser in single-mode operation over a wide current and temperature range is proposed and demonstrated. 相似文献
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Tanaka H. Uchida H. Ajioka T. Hirashita N. 《Electron Devices, IEEE Transactions on》1993,40(12):2231-2236
The effect of surface roughness of Si3N4 films on time-dependent dielectric breakdown (TDDB) characteristics of SiO2/Si3N4/SiO2 (ONO) stacked films was investigated. The surface roughness of Si3N 4 films-was found to become higher with increasing deposition temperature and to cause the degradation of TDDB characteristics of ONO films in DRAMs. A local thinning of ONO films, evaluated from the TDDB characteristics, agreed with the surface roughness measured by atomic force microscopy (AFM) and cross-sectional transmission electron microscopy (XTEM). Dependence of time to breakdown of ONO films on the deposition conditions was interpreted by electric field intensification due to the surface roughness of Si3N4 films 相似文献