应变Si NMOS器件总剂量辐射对单粒子效应的影响

针对应变Si NMOS器件总剂量辐射对单粒子效应的影响机制,采用计算机TCAD仿真进行研究。通过对比实验结果,构建50 nm应变Si NMOS器件的TCAD仿真模型,并使用该模型研究处于截至态(V_ds=1 V)的NMOS器件在总剂量条件下的单粒子效应。实验结果表明,总剂量辐照引入的氧化层陷阱正电荷使得体区电势升高,加剧了NMOS器件的单粒子效应。在2 kGy总剂量辐照下,漏极瞬态电流增加4.88%,而漏极收集电荷增量高达29.15%,表明总剂量辐射对单粒子效应的影响主要体现在漏极收集电荷的大幅增加方面。     

应变Si/SiGe沟道功率UMOSFET的模拟分析

提出一种应变Si/SiGe UMOSFET结构,并与Si-UMOSFET器件的电流-电压特性进行比较;对SiGe区域在UMOSFET器件中的不同厚度值进行静态电学仿真。应变Si/SiGe异质结能够有效地提高沟道区载流子的迁移率,增大IDS,降低Vth及器件的Ron;且应变异质结与载流子有效传输沟道距离的大小,对器件的Vth、Isat、V(BR)DSS及电流-电压特性都有较大的影响。因此在满足击穿电压要求的基础上,应变Si/SiGe沟道异质结的UMOSFET相对Si-UMOSFET在I-V特性和Ron方面有较大的改进。     

一种新型SGOI SiGe异质结双极型晶体管

为了改善SiGe异质结双极型晶体管(HBT)的电学特性和频率特性,设计了一种新型的SGOI SiGe HBT。在发射区引入了双轴张应变Si层。多晶Si与应变Si双层组合的发射区有利于提高器件的注入效率。利用Silvaco TCAD软件建立了二维器件结构模型,模拟了器件的工艺流程,并对器件的电学特性和频率特性进行了仿真分析。结果表明,与传统的SiGe HBT相比,新型SGOI SiGe HBT的电流增益β、特征频率fT等参数得到明显改善,在基区Ge组分均匀分布的情况下,β提高了29倍,fT提高了39.9%。     

应变Si p-MOSFET电流特性研究

生长在弛豫SiGe层上的Si产生张应变,使载流子的迁移率显著提高,因此应变Si PMOSTET可以得到非常好的性能.在讨论分析了应变Si PMOSFET 的结构特性和器件物理的基础上,推导泊松方程求出解析的阈值电压模型,以及电流电压特性,和跨导等电学特性参数模型,并用MATLAB进行了模拟,与参考文献取得了一致的结果.此模型作为对PMOSFET进行模拟是非常有用的工具.     

提升亚微米Si CMOS器件性能的新技术———应变Si技术

详细介绍了应变Si技术产生的起因及特性、应变Si器件的优势、应变 Si器件应用中存在的问题并对应变 Si技术的市场应用前景作了简单的介绍。     

应变硅电子迁移率解析模型

提出了一个应变硅沟道电子迁移率解析模型.模型以应变张量为对象研究应变硅沟道电子迁移率,因此与工艺相独立;适用于施加双轴应力及<100>/<110>方向单轴应力,沟道方向为<100>/<110>的器件;易于嵌入常用仿真工具中.     

基于槽形结构的c-CESL应变95nm栅NMOSFET性能增强技术

本文针对应变NMOSFET提出了一种基于槽型结构的应力调制技术。该技术可以利用压应变的CESL（刻蚀阻挡层）来提升Si基NMOSFET的电学性能,而传统的CESL应变NMOSFET通常采用张应变CESL作为应力源。为研究该槽型结构对典型器件电学性能的影响,针对95 nm栅长应变NMOSFET进行了仿真。计算结果表明,当CESL应力为-2.5 GPa时,该槽型结构使沟道应变状态从对NMOSFET不利的压应变（-333 MPa）转变为有利的张应变（256 MPa）,从而使器件的输出电流和跨导均得到提升。该技术具有在应变CMOS中得到应用的潜力,提供了一种不同于双应力线（DSL）技术的新方案。     

应变硅电子迁移率解析模型

提出了一个应变硅沟道电子迁移率解析模型.模型以应变张量为对象研究应变硅沟道电子迁移率,因此与工艺相独立;适用于施加双轴应力及<100>/<110>方向单轴应力,沟道方向为<100>/<110>的器件;易于嵌入常用仿真工具中.     

延续摩尔定律的新材料——应变Si

介绍了应变Si材料的需求背景和必要性.阐述了在MOS器件中使用衬底致双轴应变后器件性能的改善,在总结了与工艺致单轴应变相比衬底致双轴应变的不足以及工艺致单轴应变的优势之后,讲述了基于SiGe源漏和基于双应力线的两种工艺致单轴应变技术及其对MOS器件性能的提高.简单介绍了国际上近年来对应变Si材料与器件的研究发展状况和应变Si技术达到的各种水平,以及国内对应变Si的研究状况,并对应变Si技术的使用优势和应用前景做了简单分析.     

绝缘层上Si/应变Si1-xGex/Si异质结p-MOSFET电学特性二维数值分析

对绝缘层上Si/应变Si1-xGex/Si异质结p-MOSFET电学特性进行二维数值分析,研究了该器件的阈值电压特性、转移特性、输出特性.模拟结果表明,随着应变Si1-xGex沟道层中的Ge组分增大,器件的阈值电压向正方向偏移,转移特性增强;当偏置条件一定时,漏源电流的增长幅度随着Ge组分的增大而减小;器件的输出特性呈现出较为明显的扭结现象.     

应变硅NMOS晶体管沟道应变的模拟研究

建立了一种基于硅/锗硅异质结构的应变硅NMOS晶体管的有限元模型,通过模拟研究了沟道区的应变分布及其与器件参数的关系。结果表明,提高锗硅虚拟衬底中锗的摩尔组分、减小应变硅层厚度,可以增加沟道应变。此外,应变量还随器件结构长度的增加而增加。研究结果可为应变硅器件的设计、工艺优化提供参考依据。     

Multi-scale Simulation Methodology for Stress Assessment in 3D IC: Effect of Die Stacking on Device Performance

Potential challenges with managing mechanical stress distributions and the consequent effects on device performance for advanced 3D integrated circuit (IC) technologies are outlined. A set of physics-based compact models for a multi-scale simulation, to assess the mechanical stress across the device layers in silicon chips stacked and packaged with the 3D through-silicon-via (TSV) technology, is proposed. A calibration technique based on fitting to measured stress components and electrical characteristics of the test-chip devices is presented. For model validation, high-resolution strain measurements in Si channels of the test-chip devices are needed. At the nanoscale, the transmission electron microscopy (TEM) is the only technique available for sub-10 nm strain measurements so far.     

Influence of γ-ray total dose radiation effect on the hot carrier gate current of the uniaxial strained Si nano-scale NMOSFET

The carrier microscopic transport process of uniaxial strained Si n-channel metal-oxide-semiconductor field-effect transistor (NMOSFET) has been analyzed under γ-ray radiation. The variation of oxide-trapped charge (N_ot) and interface-trap charge (N_it) with the total dose has also been investigated. An analytical model of hot carrier gate current of the uniaxial strained Si nanometer scale NMOSFET has been developed with the degradation due to the total dose irradiation taken into consideration. Based on the model, numerical simulation has been carried out by Matlab. The influence of the total dose, geometry and physics parameters on gate current was simulated. Furthermore, to evaluate the validity of the model, the simulation results were compared with experimental data, and good agreements were confirmed. Thus, the proposed model provides good reference for research on irradiation reliability and application of strained integrated circuit of uniaxial strained Si nanometer scale n-channel metal-oxide-semiconductor field-effect transistor.     

A logic nanotechnology featuring strained-silicon

Strained-silicon (Si) is incorporated into a leading edge 90-nm logic technology . Strained-Si increases saturated n-type and p-type metal-oxide-semiconductor field-effect transistors (MOSFETs) drive currents by 10 and 25%, respectively. The process flow consists of selective epitaxial Si/sub 1-x/Ge/sub x/ in the source/drain regions to create longitudinal uniaxial compressive strain in the p-type MOSFET. A tensile Si nitride-capping layer is used to introduce tensile uniaxial strain into the n-type MOSFET and enhance electron mobility. Unlike past strained-Si work: 1) the amount of strain for the n-type and p-type MOSFET can be controlled independently on the same wafer and 2) the hole mobility enhancement in this letter is present at large vertical electric fields, thus, making this flow useful for nanoscale transistors in advanced logic technologies.     

Physics of Hole Transport in Strained Silicon MOSFET Inversion Layers

A comprehensive quantum anisotropic transport model for holes was used to study silicon PMOS inversion layer transport under arbitrary stress. The anisotropic band structures of bulk silicon and silicon under field confinement as a twodimensional quantum gas are computed using the pseudopotential method and a six-band stress-dependent k.p Hamiltonian. Anisotropic scattering is included in the momentum-dependent scattering rate calculation. Mobility is obtained from the Kubo–Greenwood formula at low lateral field and from the fullband Monte Carlo simulation at high lateral field. Using these methods, a comprehensive study has been performed for both uniaxial and biaxial stresses. The results are compared with device bending data and piezoresistance data for uniaxial stress, and device data from strained Si channel on relaxed SiGe substrate devices for biaxial tensile stress. All comparisons show a very good agreement with simulation. It is found that the hole band structure is dominated by 12 “wings,” where mechanical stress, as well as the vertical field under certain stress conditions, can alter the energies of the few lowest hole subbands, changing the transport effective mass, density-of-states, and scattering rates, and thus affecting the mobility.     

New opportunities for SiGe and Ge channel p-FETs

A thin body (fully depleted) strained SGOI device structure (FDSGOI), and a strained SiGe channel layer on SOI, were fabricated using scaled high-κ gate dielectrics and metal gate technology. The uniaxial strain effect and corresponding drive current enhancement reported by Irisawa et al. [1] for narrow-width devices was investigated on these structures. Although the strained FDSGOI device structure exhibited reduced off-state leakage compared to thicker body devices, and long-channel drive current enhancement under uniaxial strain, the loss of drive current enhancement at short channel length led to uncompetitive I_ON-I_OFF characteristics. The SiGe on SOI structure showed the highest long-channel drive current enhancement (nearly 3×) in the narrowest devices, and also showed a significant reduction in off-state current. This trend was maintained down to the shortest channel lengths studied here and resulted in I_ON-I_OFF characteristics that were competitive with contemporary uniaxial strained Si channel devices.     

The Effects of Mechanical Uniaxial Stress on Junction Leakage in Nanoscale CMOSFETs

This paper reports the influences of uniaxial mechanical stress on the reverse-biased source/drain to substrate junction leakage of state-of-the-art 65 nm CMOS transistors. For n-channel metal-oxide-semiconductor (NMOS) transistors, the band-to-band tunneling (BTBT) dominates the junction leakage current due to heavily doped junction and pocket implants. However, for p-channel metal-oxide-semiconductor (PMOS) transistors with embedded SiGe source/drain, the leakage current is found to result from both BTBT and generation current due to defects generated in the SiGe layer and at the SiGe/Si interface. A four-point bending technique is used to apply mechanical uniaxial stress on NMOS and PMOS devices along the longitudinal direction. It was found that the leakage current of both devices increases (decreases) with applied uniaxial compressive (tensile) stress, and that the strain sensitivity of the junction leakage of NMOS transistors is much weaker than that of PMOS transistors. By combining the bending technique with process strained Si (PSS) technology, additional stress was applied to NMOS and PMOS with high built-in stress to investigate the characteristics of junction leakage under extremely high uniaxial stress. It is shown that uniaxial tensile stress can both enhance the NMOS device performance and decrease the junction leakage. However, for the PMOS, there exists a tradeoff between boosting the transistor performance and decreasing the junction leakage current, so there is a limit in the amount of compressive stress that can be beneficially applied.     

Strain Effects on Electronic Bandstructures in Nanoscaled Silicon: From Bulk to Nanowire

In this paper, we present a comparative computational study on strain effects in Si nanostructures including bulk, thin film, and nanowire configurations. We employed a first principles calculation to identify the bandstructure parameters such as band splitting energy and transport effective mass. As a result, we found that bulk Si and Si thin film have similar strain effects on the bandstructure parameters under uniaxial $langlehbox{110}rangle$ strain. Particularly, the effective mass reduction of electrons due to uniaxial $langlehbox{110}rangle$ strain is expected even in Si thin film. On the other hand, Si nanowire structure with nanoscale cross section has lighter transport effective mass than the other structures, regardless of the amount of uniaxial strain.