共查询到17条相似文献,搜索用时 78 毫秒
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高压线上实现电力系统扩频通信 总被引:1,自引:0,他引:1
通信是电力系统的重要组成部分,电力通信在协调电力系统发、送、变、配、用电等组成部分的联合运转及保证电网安全、经济、稳定、可靠地运行方面发挥了应有的作用,并有力地保障了电力生产、基建、电力调度、继电保护、安全自动装置、远动、计算机通信、电网调度自动化等通信需要。现在电力通信向着综合数据通信为主的方向发展,通信媒体又增加了光纤和卫星数字通信,但高压电力线载波通信在整个电力线通信网中仍占到12%的比重。 相似文献
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用STEL-2000A实现直接序列扩频收发系统 总被引:1,自引:1,他引:0
本文介绍了全数字式直接序列扩频芯片STEL-2000A的主要性能和用法,并以STEL-2000A为核心,辅以若干外围器件,构成了一个可用于野战信息传输的扩频收发系统。 相似文献
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为了缩短卷积编码器设计周期,使硬件设计更具灵活性,在介绍卷积编码器原理的基础上,论述了一种基于可编程逻辑器件,采用模块化设计方法,利用VHDL硬件描述语言实现CDMA2000系统前向链路卷积编码器的方法,给出了在QuartusⅡ软件下的仿真结果,并在FPGA器件上验证实现。仿真和实验都证明了这种方法的可行性和正确性。 相似文献
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扩频通信接收机关键技术的FPGA实现 总被引:2,自引:0,他引:2
扩频伪码的捕获与跟踪是扩频通信接收机的关键技术,其实现十分复杂并且需要大量的软/硬件资源。为了实现接收机的小型化、降低功耗、提高系统的性能和可靠性,提出了采用FPCA实现扩频伪码的捕获与跟踪及其他关键技术,在FPCA上集成数字下变频、载波振荡器、匹配滤波器、伪码发生器、载波跟踪环、伪码跟踪环和解扩共7个模块。详细讨论了各模块的设计方案,并对扩频伪码的捕获进行了仿真,仿真结果证明了设计方案是正确的。 相似文献
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本文首先介绍了 FPGA的设计思想及流程,然后以一种扩频通信调制器为例,描述了如何实现自顶向下的设计,并重点分析了PN码产生器模块的设计及仿真过程 相似文献
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Chip synchronisation for direct-sequence spread-spectrum communication with bandlimited instead of rectangular chip pulses is investigated and described. The tracking error variances of several coherent and noncoherent digitally implementable chip synchronisation algorithms are evaluated and compared.<> 相似文献
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Migration towards a full-digital implementation of modems is currently one of the main trends in transmission systems design. The authors describe a noncoherent all-digital delay lock loop (DDLL) suited for chip timing synchronization in band-limited direct sequence spread spectrum (DS/SS) systems, and they thoroughly analyze its performance. The key features of this novel scheme are represented by its low-complexity processing section together with its good tracking capability. Analytical expressions for the DDLL S-curve and steady-state timing jitter are derived and confirmed by a time-domain computer simulation. Furthermore, the Mean Time to Lose Lock (MTLL) of the loop is evaluated and some numerical results are reported. The proposed chip timing synchronization scheme reveals also an improved tracking performance when compared to the traditional analog DLL for rectangular chip DS/SS signals 相似文献
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针对采用芯片nRF905的LED屏无线通信,分别给出了上位机和下位机的系统框图,分析了系统的功耗,比较了无线模块和串口通信的通信速率,验证了系统的可行性,设计了串口通信协议,为保证数据质量,设计了数据通信协议,针对串口数据的nRF905分包转发,设计了无线芯片通信协议,例举了状态机的5种状态,介绍了状态间的转换条件,巧妙地编程设计了通信数据的定时器检查,论述了基于状态机的嵌入式单片机软件编程。 相似文献
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Jain R. Samueli H. Yang P.T. Chien C. Chen G.G. Lau L.K. Chung B.-Y. Cohen E.G. 《Solid-State Circuits, IEEE Journal of》1992,27(1):44-58
The design of a binary-phase shift-keyed (BPSK) spread-spectrum chip set with an integrated CAD environment called VANDA is described. VANDA uses the functional compiler concept to integrate system and physical designs, thus allowing complex high-performance integrated circuit chips to be implemented easily. Three functional compilers have been designed and implemented for the design of a spread-spectrum transceiver: a pseudonoise (PN) generator compiler, a direct digital frequency synthesizer (DDFS) compiler, and a Costas loop compiler. Three test chips for a BPSK digital intermediate frequency (IF) spread-spectrum system generated by these compilers have been fabricated and tested. Details of each of the functional compilers and the test chips are described. In addition, the measurement results for digital IF transceiver test boards constructed using these chips are presented 相似文献
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本实训平台着眼于提升高职层次学生的职业能力,围绕典型的数字通信系统模型,设计了扩展性强、可测性好的FPGA核心板,并开发了多个配套的功能模块.凭借着FPGA强大的硬件可编程能力,创设了分层递进的实验模式.学生通过逐步深入的实验项目,牢牢掌握数字通信系统构成的基本要素,同时初步掌握实现现代通信产品的典型技术手段. 相似文献