Hot-carrier effects in fully depleted submicrometer NMOS/SIMOX asinfluenced by back interface degradation

From a systematic study of the hot-carrier-induced degradation in fully depleted submicrometer NMOS/SIMOX as a function of front- and back-gate biases during stress, the authors found that the apparent changes of the front-channel transistor parameters, measured at grounded back gate, could be largely attributed to the virtual back-gate bias effect arising from the trapped charge in the buried oxide. The strong dependence of carrier injection at the back interface on the back-gate bias and its resulting effect on the front-channel transistor parameters are also presented     

Hot-electron-induced degradation of front and back channels inpartially and fully depleted SIMOX MOSFETs

The characteristics of the front and back channels of 1-μm-long SIMOX MOSFETs were measured before and after various types of periods of hot-electron stress, and a comparison between the induced degradations was made. The back channel degrades much more severely than the front channel for both partially depleted and fully depleted devices. Fully depleted MOSFETs (140-nm-thick) are favorably contrasted with partially depleted ones (300-nm-thick) as to their vulnerability to hot-carrier-induced damage. Although defects are always located at and/or near the interface of the stressed channel, they may influence the properties of the opposite channel (via interface coupling) in fully depleted MOSFETs     

Plasma process-induced damage on thick (6.8 nm) and thin (3.5 nm) gate oxide: parametric shifts, hot-carrier response, and dielectric integrity degradation

It is shown that the primary manifestation of charging damage in thin (<4 nm) oxides is a degradation of dielectric integrity, while the primary manifestation of damage in thick (>6 nm) oxides is a shift in threshold voltage and/or the degradation of hot-carrier immunity. It is therefore necessary to monitor both dielectric integrity and parametric shifts to determine the consequences of charging damage on a technology with multiple gate oxide thicknesses. We demonstrate the efficacy of a ramp breakdown methodology for measuring dielectric integrity, showing that a simple measurement of current is not sufficiently sensitive, and that results equivalent to a lengthy time-to-breakdown test may be achieved. We describe a highly accelerated hot-carrier stress for monitoring damage on thicker oxide and show how it illuminates latent damage and is superior to Fowler–Nordheim stressing for this purpose. Furthermore, we show data on some thousands of chips from a manufacturing line, which demonstrates robust charging behavior for realistic gate and wiring antennas.     

High rate (~7 nm/s), atmospheric pressure deposition of ZnO front electrode for Cu(In,Ga)Se2 thin‐film solar cells with efficiency beyond 15%

Undoped zinc oxide (ZnO) films have been grown on a moving glass substrate by plasma‐enhanced chemical vapor deposition at atmospheric pressure. High deposition rates of ~7 nm/s are achieved at low temperature (200 °C) for a substrate speed from 20 to 60 mm/min. ZnO films are highly transparent in the visible range (90%). By a short (~minute) post‐deposition exposure to near‐ultraviolet light, a very low resistivity value of 1.6·10⁻³ Ω cm for undoped ZnO is achieved, which is independent on the film thickness in the range from 180 to 1200 nm. The photo‐enhanced conductivity is stable in time at room temperature when ZnO is coated by an Al₂O₃ barrier film, deposited by the industrially scalable spatial atomic layer deposition technique. ZnO and Al₂O₃ films have been used as front electrode and barrier, respectively, in Cu(In,Ga)Se2 (CIGS) solar cells. An average efficiency of 15.4 ± 0.2% (15 cells) is obtained that is similar to the efficiency of CIGS reference cells in which sputtered ZnO:Al is used as electrode. Copyright © 2013 John Wiley & Sons, Ltd.