λ/4-shifted DFB laser/electroabsorption modulator integratedlight source for multigigabit transmission

High-speed, low-chirp, and low voltage driving characteristics of 1.55-μm λ/4-shifted distributed-feedback (DFB) laser/InGaAsP electroabsorption modulator integrated light sources are reported. By optimization of the composition and thickness of the modulator waveguide, the driving voltage for a 10-dB extinction ratio was reduced to 1.4-3 V, depending on the modulator length in the range of 240-125 μm. High-speed modulation up to 10-Gb/s NRZ modulation was achieved by the integrated device with a 125-μm modulator length. The linewidth enhancement factor of the integrated modulator was estimated to be 0.15-0.48     

Highly efficient 40-GHz bandwidth Ti:LiNbO3 opticalmodulator employing ridge structure

The design and fabrication of a Ti:LiNbO₃ optical modulator employing a ridge structure with a shielding plane are described. The ridge structure offers a relatively low microwave propagation loss and large interaction between the microwave and optical wave under the condition of a 50 Ω characteristic impedance system, resulting in a large modulation bandwidth and low driving voltage. As a result, a 3-dB optical bandwidth of 40 GHz with a driving voltage of 3.6 V is achieved at 1.5 μm     

Electronically controlled high-speed wavelength-tunable femtosecondsoliton pulse generation using acoustooptic modulator

The compact system of electronically controlled high-speed wavelength-tunable femtosecond (fs) soliton pulse generation is realized for the first time using a passively mode-locked fs fiber laser, a polarization maintaining optical fiber, and an acoustooptic (A-O) modulator. The wavelength of the output pulses can be continuously tuned simply by controlling the input voltage into the A-O modulator. The wavelength of the soliton pulses can be changed at 2.5-μs intervals. Wavelength stabilization, time division wavelength multiplexed soliton pulse generation, and a wavelength scanner have been demonstrated     

Scaled CMOS technologies with low sheet resistance at 0.06-μmgate lengths

A novel Ti self-aligned silicide (salicide) process using a combination of low dose molybdenum and preamorphization (PAI) implants and a single rapid-thermal-processing (RTP) step is presented, and shown to be the first Ti salicide process to achieve low sheet resistance at ultrashort 0.06-μm gate lengths (mean=5.2 Ω/sq, max=5.7 Ω/sq at 0.07 μm; mean=6.7 Ω/sq, max=8.1 Ω/sq at 0.06 μm, TiSi₂ thickness on S/D=38 nm), in contrast with previous Ti salicide processes which failed below 0.10 μm. The process was successfully implemented into a 1.5 V, 0.12-μm CMOS technology achieving excellent drive currents (723 and 312 μA/μm at I_OFF=1 nA/μm for nMOS and pMOS, respectively)     

A low-resistance self-aligned T-shaped gate for high-performancesub-0.1-μm CMOS

This paper describes the high performance of T-shaped-gate CMOS devices with effective channel lengths in the sub-0.1-μm region. These devices were fabricated by using selective W growth, which allows low-resistance gates smaller than 0.1 μm to be made without requiring fine lithography alignment. We used counter-doping to scale down the threshold voltage while still maintaining acceptable short-channel effects. This approach allowed us to make ring oscillators with a gate-delay time as short as 21 ps at 2 V with a gate length of 0.15 μm. Furthermore, we experimentally show that the high circuit speed of a sub-0.1-μm gate length CMOS device is mainly due to the PMOS device performance, especially in terms of its drivability     

A 1.5-V-100-μW ΔΣ modulator with 12-b dynamic rangeusing the switched-opamp technique

The design and implementation of a very low supply voltage/low power ΔΣ modulator is presented. It is based on the switched-opamp technique, which allows low voltage operation with a standard process and without voltage multiplication. The design methodology is illustrated with a second-order single-loop ΔΣ modulator. The chip is implemented in a 0.7-μm CMOS process with standard threshold voltages. The power supply is 1.5 V and the power dissipation is only 100 μW. The measured dynamic range in the speech bandwidth of 300-3400 Hz is 12 b. The total harmonic distortion (THD) is lower than -72 dB     

Light-to-light transducers with amplification

A device considered as a light-to-light transducer with amplification has been proposed and fabricated. The device structure is direct and has vertical (but offset) integration of a heterojunction phototransistor onto a cladding layer of a double-heterojunction light-emitting diode on one side of a substrate. Light amplification becomes possible by combining a transistor function and a light-emitting function. A gain of 15 times has been measured against an input-light-power of 10 μW at 1.15-μm wavelength, at a bias voltage of 4.25 V, and with a load resistance of 5 Ω. With the utilization of the Early effect in the weak-input-power range and the suppression of a regenerative effect in the intermediate-power range, an amplification characteristic close to the linear relation has been realized, for the first time, for an input light power from 0 to 20 μW, at a bias voltage of 4.0 V and with a load resistance of 5 Ω     

Double-ended thyratrons in high-power burst mode pulse modulator applications

The use of four-gap double-ended thyratrons in a 30- to 100-µs pulse modulator is described. The PFN-type modulator operates at 105-kV peak, charged from the 11-kV public supply, and powers an ill-matched and potentially unreliable load directly at 30 to 70 kV without a pulse transformer. The maximum repetition rate is 200 pps. The completed modulator has been delivered to the customer and successfully recommissioned. Satisfactory operation is reported with 200-MW 6-kJ pulses in bursts of average power up to 400 kW; this is well in excess of the published ratings of the tubes employed. The methods used to obtain this performance are discussed and the main details are given of pulse discharge, energy dump, and switched charge circuits appropriate to the thyratrons used. The possibility of uprating the modulator is mentioned, and certain recent developments in large thyratrons are discussed. These include a new pentode-type electrode system which should give improved performance with simpler deck circuitry. For extended bursts at long pulse lengths the realistic maximum capability of single tubes in current production seems to be about 1-GW peak at 2-MW average power.     

载频解调式脉冲调制器的研制

介绍了一种新型载频解调式栅极脉冲调制器.调制器由2只脉冲变压器、载频调制控制电路、解调与脉冲输出电路组成.调制器采用了内载频脉冲驱动模式,利用了MOSFET的极分布电容对信号的延时作用,通过二极管解调还原调制管触发脉冲,最终输出正负电压的调制脉冲.载频信号频率大于200 kHz,隔离变压器具有尺寸小,绕组匝数少的特点.采用这种模式的调制器,输出脉冲宽度宽、前后沿小、工作比高.详细介绍了基于载频解调式脉冲调制器的应用实例,并对其性能参数进行了测试.     

A rail-to-rail, constant gain, buffered op-amp for real time videoapplications

Inspired by Hogervorst et al's current switch idea, a buffered output stage operational amplifier was designed, which has high frequency, high dc gain, and rail-to-rail constant transconductance (G _m). This operational amplifier is the output stage of an analog/digital system which implements a Gabor convolution for real-time dynamic image processing and it is designed to interface the external analog-to-digital converter (ADC) with a very heavy load. The op amp was fabricated by the MOSIS service in a 2-μm, n-well CMOS, double polysilicon, double metal technology. The fabricated circuit operates from a single 5 V power supply and dissipates 10 mW. The open loop-gain of the fabricated circuit, A_vol, was measured as 67.2 dB for a 163 Ω∥33 pF load. Other dc and ac characteristics were measured for a 50 Ω∥33 pF load. The unify gain-bandwidth (GBW) was measured to be 11.4 MHz, the rising slew rate (SR+) 20.4 V/μs, the falling slew rate (SR-) 18.8 V/μs, and the offset voltage (V_off) 1 mV. The output swings with an amplitude of 3.24 V between 0.88 V and 4.12 V, which matches the input signal specifications of the ADC. In addition to rail-to-rail output voltage swing, the opamp has a constant G_m over the whole common mode (CM) voltage range     

Design comparison of single-anode and double-anode 300-MW magnetroninjection gun

Analytic tradeoff equations based on adiabatic assumptions are used to explore feasible design regions for single-anode magnetron injection guns (MIGs). Particle simulations are then used to optimize a single-anode and a double-anode design for a 1-μs, 500-kV, 600-A MIG which is required for a second-harmonic gyroklystron. The advantages and disadvantages of each configuration are critically examined     

Low resistance intracavity-contacted oxide-aperture VCSELs

The authors study, analytically and experimentally, the extrinsic series resistance in intracavity-contacted vertical-cavity surface-emitting lasers (VCSEL's). Low resistance, low threshold-current, intracavity-contacted VCSELs are fabricated, with resistances ranging from 355 Ω for 4-μm square apertures to 80 Ω for 12-μm square apertures and threshold voltages as low as 1.35 V. To the best of our knowledge, these are the lowest values reported for this type of VCSEL. The threshold currents range from 270 μA for 4 μm×4 μm apertures to 850 μA for 12 ×12 μm. From a comparison of the resistance as a function of oxide aperture radius, the measured data follows closely with the calculated data, demonstrating the validity of the derived expressions for series resistance     

基于电流型脉宽调制器的自适应反激驱动开关电源的设计

分析了一种采用3844B电流型脉宽调制器控制,实现多路输出的单端反激式大功率IGBT驱动电源。根据控制芯片特性与输出要求给出了详细的电路参数,设计了符合要求的高频变压器,提出改进的反馈控制方法,具有很强的自适应性。实验结果表明,该电源的可靠性更高,稳定性好,输出纹波小,能够适应规定电网电压波动195V到265V的要求,甚至更大的电压波动。     

1.57 μm strained-layer quantum-well GaInAlAs ridge-waveguidelaser diodes with high temperature (130°C) and ultrahigh-speed (17GHz) performance

The fabrication of GaInAlAs strained-layer (SL) multiple-quantum-well (MQW) ridge-waveguide (RW) laser diodes emitting at 1.57 μm is discussed. Due to an optimized layer structure, a very high characteristic temperature of 90 K was obtained. As a consequence for episide-up mounted devices, the maximum continuous wave (CW)-operation temperature is 130°C. At room temperature, a maximum output power of 47 mW was measured for 600-μm-long lasers with one high-reflection coated facet. The low series resistance of 4 Ω (2 Ω) for 200-μm-(400-μm)-long devices yields an ultrahigh 3-dB bandwidth of 17 GHz. These static and dynamic properties also result from a high internal quantum-efficiency of 0.83 and a high differential gain of 5.5×10^-15 cm²     

Design and performance of externally modulated 1.5-μm lasertransmitter in the presence of chromatic dispersion

Key laser and modulator characteristics that impact the use of externally modulated lasers in the presence of chromatic dispersion, excluding effects due to fiber nonlinearities, are reviewed. After a brief consideration of transmission performance with directly modulated 1.5-μm DFB lasers which have limited application of up to 80 km at 2.5 Gb/s, the key design characteristics of externally modulated transmitters are discussed. Experimental results showing the effects of modulator chirp and laser linewidth at a 2.5-Gb/s transmission rate are presented. It is found that lasers with CW linewidth under 100 MHz have less than 2-dB dispersion penalty for 600 km of non-dispersion-shifted fiber. Lower dispersion penalties can be realized if the modulator chirp is tuned so as to narrow the transmitted pulses. Excellent modulator stability is demonstrated for 60 days of error- and degradation-free 2.5-Gb/s operation     

Spiral inductors on Si p/p+ substrates with resonantfrequency of 20 GHz

Porous Si of up to 200 μm in thickness has been used to fabricate high-performance spiral inductors on heavily doped Si substrates (0.007 Ω-cm). Spiral inductors with L~5.7 nH are fabricated demonstrating Q_max~29 at 7 GHz and f_r>20 GHz. The resonant frequency (f_r) increases with increasing porous Si thickness and saturates beyond 120 μm. A corresponding decrease in total capacitance is observed. Q_max increases monotonically with porous Si layer thickness to beyond 200 μm. For inductors with a smaller footprint, Q_max begins to saturate at less than 100-μm thick porous Si     

A low-power CMOS time-to-digital converter

A time-to-digital converter, TDC, with 780 ps lsb and 10-μs input range has been integrated in a 1.2-μm CMOS technology. The circuit is based on the interpolation time interval measurement principle and contains an amplitude regulated crystal oscillator, a counter, two pulse-shrinking delay lines, and a delay-locked loop for stabilization of the delay. The TDC is designed for a portable, low-power laser range-finding device. The supply voltage is 5±0.5 V, and the operating temperature range is -40 to +60°C. Single-shot accuracy is 3 ns and accuracy after averaging is ±120 ps with input time intervals 5-500 ns. In the total input range of 10 μs, the final accuracy after averaging is ±200 ps. Current consumption is 3 mA, and the chip size is 2.9 mm×2.5 mm     

A 2.5-Mb/s GFSK 5.0-Mb/s 4-FSK automatically calibratedΣ-Δ frequency synthesizer

This paper describes a new sigma-delta (Σ-Δ) frequency synthesizer for Gaussian frequency and minimum shift keying (GFSK/GMSK) modulation. The key innovation is an automatic calibration circuit which tunes the phase-locked loop (PLL) response to compensate for process tolerance and temperature variation. The availability of this new calibration method allows the use of precompensation techniques to achieve high data rate modulation without requiring factory calibration. The calibration method can be applied to GFSK/GMSK modulation and also M-ary FSK modulation. The PLL, including 1.8-GHz voltage controlled oscillator (VCO), Σ-Δ modulator, and automatic calibration circuit, has been implemented in a 0.6-μm BiCMOS integrated circuit. The test chip achieves 2.5 Mb/s using GFSK and 5.0 Mb/s using 4-FSK     

A 130-mm2, 256-Mbit NAND flash with shallow trenchisolation technology

A 256-Mbit flash memory has been developed using a NAND cell structure with a shallow trench isolation (STI) process. A tight bit-line pitch of 0.55 μm is achieved with 0.25-μm STI. The memory cell is shrunk to 0.29 μm², which realizes a 130-mm² , 256-Mbit flash memory. Peripheral transistors are scaled with memory cells in order to reduce fabrication process steps. A voltage down converter, which generates 2.5-V constant internal power source, is applied to protect the scaled transistors. An improved bit-line clamp sensing scheme achieves 3.8-μs first access time in spite of long and tight pitch bit-line. A 1-kbyte page mode with 35-ns serial data out realizes 25-Mbyte/s read throughput. An incremental step pulse with a bit by bit verify scheme programs 1-k cells in 1-V Vt distribution within 200 μs. That realizes 4.4-Mbyte/s programming throughput     

Emission characteristics of silicon vacuum triodes with fourdifferent gate geometries

Arrays of 10×10, 30×30, and 50×50 phosphorus-doped 0.005-0.025 Ω-cm, monocrystalline silicon field emitters have been fabricated with an emitter height of approximately 4.5 μm, a cone angle of 110°, and four gate openings ranging from 1.8 to 5.3 μm. The placement of the rims of the gates range from coplanar with the apexes of the emitters for the 1.8-μm devices to fully recessed for the 5.3-μm devices. The devices have been characterized in terms of geometry-dependent β factors, scaling of emission currents with array size, temperature dependency from room temperature to 48 K, pressure dependency from 2.5×10^-9 to 0.8×10^-5 torr, current fluctuations at room temperature and at 48 K, and image formation. All of the measurements have been performed by operating the devices in the gate-induced field emission mode