死区对PWM逆变器共模电压的影响及其抑制方法

变频器采用的空间矢量脉宽调制(SVPWM)会产生共模电压,后者对变频器和电机产生危害。改进的空间矢量脉宽调制法有利于降低共模电压,但由于没有考虑死区的影响,实际效果受到较大影响。文章详细研究了死区对PWM逆变器共模电压的影响,并提出了一种消除死区的方法来抑制死区影响并对共模电压起到一定的抑制作用,使改进的空间矢量脉宽调制法能够真正达到预想的效果。最后通过Matlab仿真实验,验证了该方法的有效性。     

基于变频装置驱动的电机共模电压的抑制分析

近年来,电子元器件的使用频率增多,也相继引发了一系列的问题,而这以工模杂讯最具影响力。在这种背景下,本文旨在分析变频器驱动电机在电机端所产生的共模电压和共模电流问题,并构建起新的架构进行抑制方法研究。本文首先探讨了共模电压的影响及目前的抑制策略,进而给出了新的框架,并进行了详尽分析。     

三电平逆变器中共模电压抑制方法的研究与仿真

文章对三电平逆变器输出中的共模电压进行了分析,为了减小共模电压带来的危害,文中采用了两种SPWM控制策略即传统三电平SPWM控制策略和降低共模电压的三电平SPWM控制策略。通过Matlab/Simulink仿真比较,结果表明两种策略都起到了抑制共模电压的作用,其中降低共模电压的三电平SPWM控制技术效果更为明显。     

长电缆对PWM变频器输出的过电压分析与对策

本文介绍了PWM变频器通过长电缆传输时对电机侧电压的影响,并设计了一种R、L、C滤波器,有效降低电压峰值与差模dv／dt。     

长电缆传输引起的电机端口过电压的研究

电机与变频器通过长线电缆连接时．会在电机端口产生过电压,威胁电机的安全运行。本文在分析电机端口过电压产生机理的基础上,采用机侧滤波器抑制电机端口电压。利用MatIab／SimuIink建立仿真模型对其进行仿真分析,仿真结果验证了电机端口电压分析的正确性和所设计滤波器的有效性。     

交流电动机传动用电压源逆变器损耗的分析

整流器与逆变器是工业变频器中重要的两种变换器,其功率损耗的大小决定于变换器的调制算法、传动系统的负载特性与运行方式等因素,而变换器的功率器件功耗大小又决定了整个变频器的效率、散热处理、安全运行等方面。本文理论推导了普通SPWM、谐波注入PWM、损耗最小PWM、常规SVPWM、以及共模电压抑制时电压源逆变器中功率器件功耗的计算公式,所得结果均得到了仿真分析验证。以22kW工业变频器100A IGBT和SPWM算法为例,进行了初步模拟计算。所推导的功耗计算公式对实际逆变器散热设计具有一定的参考价值。     

电信装置的电磁兼容减轻措施手册（续二）

8．1.3电源线滤波器 减缓电源线上的共模传导骚扰噪声通常采用电源线滤波器。图19（a）和图19（b）分别表示了有、无隔离变压器时电源线滤波器的等效电路，图19（c）是一个具有隔离变压器的电源线滤波器外观图，它可以在0-50MHz之间降低共模传导噪声，可以在初级端口和次级端口之间承受10kV的浪涌冲击，也可以用于过电压和过电流的减轻措施，在使用之前，需要检查电源线滤波器对于过电压的承受电压以及额定电流。     

节约成本的EMC滤波器

借助于创新的SineFormer，爱普科斯（EPCOS）推出了全新的变频器输出滤波器技术。与传统的滤波器技术相比，新的SineFormer可以同时将相间电压转换成正弦信号，抑制共模电流，还可将导体对地电压变成正弦电压波形。该产品具有各种优点。例如，由于对电机绕组有害的电压峰值被抑制，轴承电流减少到可以忽略的水平，电机的使用寿命得以大大提高。[第一段]     

基于LabVIEW的变频器共模电磁干扰定性测量

本论文主要分析变频器在驱动电动机时的传导性电磁干扰,即变频器的PWM输出与交流电动机之间采用长导线来连接时所产生的过电压及震荡现象。该干扰一方面使电动机绕组间的绝缘性能恶化,从而对交流电机造成不良的影响和电磁干扰。本文采用LabVIEW软件构建了变频器的传导性电磁干扰测量系统,采用软件方式分离出变频器所产生的传导性电磁干扰的共模噪声。     

基于LabVIEW的变频器共模电磁干扰定性测量

本论文主要分析变频器在驱动电动机时的传导性电磁干扰,即变频器的PWM输出与交流电动机之间采用长导线来连接时所产生的过电压及震荡现象。该干扰一方面使电动机绕组间的绝缘性能恶化,从而对交流电机造成不良的影响和电磁干扰。本文采用LabVIEW软件构建了变频器的传导性电磁干扰测量系统,采用软件方式分离出变频器所产生的传导性电磁干扰的共模噪声。     

Common-Mode Ripple Current Estimator for Parallel Three-Phase Inverters

For the three-phase parallel voltage source inverter systems with common dc link, several control methods were developed to suppress the common-mode circulating current. The common-mode ripple current is the main disturbance source of the common-mode circulating current control system that forms part of the parallel discontinuous pulsewidth modulation (PWM) inverter system. In this paper, a real-time analysis method for the common-mode ripple voltage of the three-phase discontinuous PWM inverter is proposed, whereby the amplitude of the common-mode ripple current can be estimated correctly, the hysteresis width of the circulating current controller can be adjusted to be as small as possible, and consequently, the rms circulating current is minimized as well. The simulation and experimental results are presented to confirm the theoretical analysis method of the common-mode ripple current and the performance of the proposed common-mode ripple current estimator.      

A dual-bridge inverter approach to eliminating common-mode voltagesand bearing and leakage currents

This paper presents a dual-bridge inverter approach to eliminate the motor common-mode voltage and resulting bearing and leakage currents. The novel dual-bridge inverter is controlled to generate balanced excitation of the induction motor under pulsewidth modulation (PWM) inverter operation. Theoretical analysis, simulation results, and experimental results are presented to verify this concept     

Common mode current attenuation techniques for use with PWM drives

The most common modulation strategy adopted for motor control in adjustable speed drives (ASDs) is pulse width modulation (PWM). In general, the output is modulated at a carrier frequency ranging from 1.0 kHz to 20.0 kHz. Experiences with PWM drives have shown that there exist two important concerns: (1) common mode current; and (2) over-voltage at the motor when the distance between motor and the inverter is larger than the critical distance. The high carrier frequency along with fast rise and fall time of the insulated gate bipolar transistors (IGBTs) employed results in nontrivial common-mode or ground currents. The high dv/dt causes shaft voltage, which leads to bearing currents. This phenomenon has been identified as one of the reasons for premature bearing failure in PWM driven motors. A new scheme to attenuate the common mode noise and hence reduce shaft voltage is proposed. Experimental results showing the effectiveness of the proposed solution is also presented     

An active circuit for cancellation of common-mode voltage generatedby a PWM inverter

This paper proposes an active common-noise canceler (ACC) that is capable of eliminating the common-mode voltage produced by a pulsewidth modulation (PWM) inverter. An emitter follower using complementary transistors and a common-mode transformer are incorporated into the ACC, the design method of which is also presented in detail. Experiments using a prototype ACC, whose design and construction are discussed in this paper, verify its viability and effectiveness in eliminating common-mode voltage in a 3.7 kW induction motor drive using an insulated gate bipolar transistor (IGBT) inverter. Some experimental results show that the ACC makes significant contributions to reducing a ground current and a conducted electromagnetic interference (EMI). In addition, the ACC can prevent an electric shock on a nongrounded motor frame and can suppress motor shaft voltage     

A New Carrier-Based PWM Providing Common-Mode-Current Reduction and DC-Bus Balancing for Three-Level Inverters

Adjustable-speed drives involve common-mode voltages, which generate common-mode currents flowing to the ground through stray capacitances of electric machines. These currents are known to provoke premature motor-bearing failures, as well as electromagnetic interferences disturbing neighbor electronic devices. Furthermore, high-voltage applications involve high levels of these conducted emissions, which must be lowered by using bulky and expensive filters. This paper aims at elaborating a new pulsewidth-modulation (PWM) strategy in order to reduce the common-mode currents generated by three-level neutral-point-clamped inverters. The proposed strategy also provides the ability to balance the neutral point of the dc-bus capacitors. Experimental results both in time and frequency domains confirm that the new PWM improves the electromagnetic-compatibility behavior of the drive compared with conventional strategies.     

基于STM32系列单片机的数控正弦波逆变电源设计与实现

提出一种高性能全数字式正弦波逆变电源的设计方案。该方案分为前后两级,前级采用推挽升压电路将榆入的直流电升压到350V左右的母线电压．后级采用全桥逆变电路,逆变桥输出经滤波器滤波后,用隔离变压器进行电压采样,电流互感器进行电流采样,以形成反馈环节,增加电源输出的稳定性。升压级PWM驱动及逆变级SPWM驱动均由STM32单片机产生。减小了硬件开支。基于上述方案试制的400W样机,具有输出短路保护、过流保护及输入过压保护、欠压保护功能。50Hz输出时频率偏差小于0．05Hz,满载（400W）效率高于87％,电压精度为220V±1％,THD小于1．5％。     

Design and performance of a passive EMI filter for use with a voltage-source PWM inverter having sinusoidal output voltage and zero common-mode voltage

This paper deals with integrating a small-sized passive electromagnetic interference (EMI) filter with a voltage-source pulse-width modulated (PWM) inverter. The purpose of the filter is to eliminate both high-frequency common-mode and normal-mode voltages from the three-phase output voltages of the inverter. A laboratory system consisting of a 5-kVA inverter, a 3.7-kW induction motor, and a specially-designed passive EMI filter was constructed to verify the viability and effectiveness of the filter. As a result, both line-to-line and line-to-neutral output voltages look purely sinusoidal as if the inverter were an ideal three-phase variable-voltage, variable-frequency power supply when viewed from the motor terminals. This results in a complete solution to serious EMI issues related to high-frequency common-mode and normal-mode voltages produced by the PWM inverter.     

Elimination of common-mode voltage in three-phase sinusoidal powerconverters

This paper presents an active solution to a common-mode voltage created by typical three-phase inverters. It is shown that the addition of a fourth leg to the bridge of a three-phase inverter eliminates the common-mode voltage to ground created by the modulation of the inverter. An appropriate four-phase LC filter is inserted between the inverter and the load in order to create sinusoidal output line-to-line voltage. A simple modification of the modulation strategy is implemented for the four-phase inverter to achieve a three-phase wye-output neutral-to-ground voltage which is equal to zero at all times for an ideal inverter. The modulation strategy thereby completely eliminates the common-mode potential produced by traditional modulation techniques with traditional three-phase inverter topologies     

Multilevel PWM methods at low modulation indices

When utilized at low amplitude modulation indices, existing multilevel carrier-based PWM strategies have no special provisions for this operating region, and several levels of the inverter go unused. This paper proposes some novel multilevel PWM strategies to take advantage of the multiple levels in both a diode-clamped inverter and a cascaded H-bridges inverter by utilizing all of the levels in the inverter even at low modulation indices. Simulation results show what effects the different strategies have on the active device utilization. A prototype 6-level diode-clamped inverter and an 11-level cascaded H-bridges inverter have been built and controlled with the novel PWM strategies proposed in this paper