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针对死区时间引起H桥拓扑各桥臂输出电压波形偏离给定参考电压的问题,根据一个开关周期内调制波与输出电流极性提出了具有12种导通状态的新型开关方式。基于新型开关方式提出了3H桥开关次数均匀分布死区消除SVPWM方案。以三相感应电机作为负载,推导出采用死区消除SVPWM后,在输出电流过零处工频与高频工作桥臂具有的天然死区时间。MCU输出各桥臂上下开关管相位互差180°SVPWM信号以及表征调制波与输出电流极性的电平信号,而后信号经FPGA处理后获得死区消除SVPWM信号。实验结果中给出了在相同参考电压下,采用死区消除SVPWM时输出电压最大偏离给定电压在1.3%左右,而采用有死区SVPWM时最大偏离给定电压在23%左右。由此可见,由MCU与FPGA相结合的数字系统能够很好地实现开关次数均衡死区消除SVPWM策略。 相似文献
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为了防止逆变桥中同一个变流臂上下两组元件同时导通而引起直流侧电源的短路,要求导通上下桥臂的PWM互不重叠,就此提出了一种基于TMS320F2812控制的高频逆变死区时间补偿方法。通过实验表明,该补偿方法能合理地控制死区时间,避免同一个变流臂上的上下两组元件同时导通,成功地解决了逆变电路输出电压失真的问题,操作简单、实用性强,有广阔的应用前景。 相似文献
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三相单级全桥PFC变换器输入电流死区分析与补偿 总被引:1,自引:1,他引:0
研究一种三相单级全桥结构功率因数校正(PFC)变换器,该变换器工作于电感电流断续模式(DCM),可同时实现PFC、输入/输出侧电气隔离以及输出电压调节.通过对该变换器理想和非理想条件下等效电路的分析,发现由于主电路中各开关管和二极管存在导通压降,当输入电压低于主电路压降时,导通相电流将出现死区,该死区随着输入电压幅值的降低而增大.结合电路的工作原理,提出了一种抑制电流死区的补偿电路.补偿电路由6个小功率开关管和电阻构成,通过相应的控制策略,当输入电压最小的一相电压低于主电路压降时.该相电流通过补偿电路构成回路,消除电流死区.仿真与实验结果证明了理论分析的正确性. 相似文献
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研制了半桥结构的DC/DC变换器.采用带同步整流驱动输出的新型半桥控制芯片Si9122A实现了对变换器中初级开关管和次级同步整流管的PWM控制.该变换器电路结构简洁,控制调整方便.由于输出整流电路中采用低导通电阻的同步整流MOSFET替代了肖特基二极管,芯片自带同步整流管驱动信号,解决了自驱动方式信号差和外驱动方式电路复杂的问题.最后给出了实验结果. 相似文献
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死区对电压型逆变器输出误差的影响及其补偿 总被引:3,自引:0,他引:3
针对电压型逆变器的死区效应,分析了死区对逆变器输出电压谐波和电流的影响,提出一种基于功率导通时间实时检测的死区补偿和电机相电压检测方法.为避免电流过零点的直接检测或间接预估,设计硬件电路直接检测功率管的导通时间,得到逆变器的实际死区时间,并在软件中进行补偿,同时得到电机实际的相电压.采用该方法得到的死区时间反映了开关器件导通和关断时间受结温和导通电流影响的特性,最后对上述方法进行了实验验证. 相似文献
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设置死区时间是为了防止桥臂电路上下管直通问题,保证电机驱动器的可靠性。氮化镓(gallium nitride,GaN)基电机驱动器对死区设置较为敏感,死区时间过长会导致GaN器件反向导通损耗过高及电机驱动器输出波形畸变,过短则会造成输出电容损耗及高电流尖峰。该文对第一及第二死区时间的影响进行分类讨论,分析得出两种死区时间的优化原则,并基于此提出一种新型死区自适应控制方法。这种方法无需添加额外硬件电路,可以在消除输出电容损耗及电流尖峰的同时减小反向导通损耗,提高效率,并有效降低电机驱动器负载电流的总谐波失真,提高电机运行稳定性。仿真和实验验证新型死区自适应控制方法的有效性,且其在重载及高开关频率状态下较传统死区设置方法具有明显优势。 相似文献
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PWM逆变器死区效应的逻辑补偿电路的设计 总被引:2,自引:0,他引:2
在由PWM调制的功率转换器中,为防止上下同一桥臂的2个功率管发生直通短路而加入几个微秒死区时间,但这样会引起输出波形的畸变,笔者设计了一种针对死区效的逻辑补偿电路,可以应用于离线控制的PWM逆变器中。 相似文献
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Bor‐Ren Lin Chien‐Hung Liu 《International Journal of Circuit Theory and Applications》2014,42(1):15-27
This paper presents an interleaved zero voltage switching (ZVS) DC/DC converter with high input voltage applications. In order to reduce the voltage stress of MOSFETs, two half‐bridge zeta converters are connected in series at high voltage side. Thus, the voltage stress of MOSFETs can be clamped at one‐half of input voltage. Asymmetric pulse‐width modulation (APWM) is adopted to control power switches. With the resonant behavior by the leakage inductance of transformer and the output capacitance of MOSFET at the transition interval, MOSFETs can be turned on at ZVS. For each half‐bridge zeta converter, two series transformers are connected in series at the primary side and in parallel at the secondary side in order to reduce the current stress of secondary windings for high load current applications. Interleaved PWM scheme is used to control two half‐bridge converters in order to reduce the size of output filter inductor and capacitor due to the partial ripple current cancellation. Experimental results, taken from a laboratory prototype rated at 1 kW, are presented to demonstrate the converter performance. Copyright © 2012 John Wiley & Sons, Ltd. 相似文献
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An interleaved half‐bridge converter is presented for high input voltage application. The features of the proposed converter are zero voltage switching (ZVS) turn‐on for all active switches, ripple current reduction at output side, load current sharing and load voltage regulation. Two half‐bridge converters connected in series and two split capacitors are used to limit the voltage stress of each power switch at one‐half of input DC bus voltage. Thus, active switches with low voltage stress can be used at high input voltage application. On the other hand, the output sides of two half‐bridge converters are connected in parallel to share the load current and reduce the current stresses of the secondary windings and the rectifier diodes. Since two half‐bridge converters are operated with interleaved pulse‐width modulation (PWM), the output ripple current can partially cancel each other such that the resultant ripple current at output side is reduced and the size of output inductors can be reduced. In each half‐bridge converter, asymmetrical PWM scheme is used to regulate the output voltage. Based on the resonant behavior by the output capacitance of MOSFETs and the leakage inductance (or external inductance) of transformers, active switches can be turned on at ZVS during the transition interval. Thus, the switching losses of power MOSFETs are reduced. The proposed converter can be applied for high input voltage applications such as three‐phase 380‐V utility system. Finally, experiments based on a laboratory prototype with 960‐W rated power are provided to demonstrate the performance of proposed converter. Copyright © 2012 John Wiley & Sons, Ltd. 相似文献
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Analysis and implementation of a soft switching DC/DC converter with three asymmetric PWM circuits
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Bor‐Ren Lin Chih‐Chieh Chen 《International Journal of Circuit Theory and Applications》2014,42(5):494-510
This paper presents a soft switching converter with three buck‐type active clamp circuits (or asymmetric half‐bridge circuits) to achieve the functions of the low power rating on the transformers and power semiconductors and low current rating on the rectifier diodes and output inductors. Three half‐bridge circuits are stacked at the high voltage side to reduce the voltage stress of each power switch at one‐half of input voltage and connected in parallel at the low voltage side to share load current and reduce the current rating on each magnetic component and the rectifier diode. Thus, the size of the output chokes is reduced. In each half‐bridge converter, the asymmetric pulse‐width modulation is adopted to control power switches. Power MOSFETs can be turned on with zero voltage during the transition interval due to the resonant behavior by the output capacitance of MOSFETs and the leakage inductance (or external inductance) of transformers. Experiments based on a laboratory prototype with 1 kW rated power are provided to demonstrate the performance of proposed converter. Copyright © 2012 John Wiley & Sons, Ltd. 相似文献
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Bor‐Ren Lin Chung‐Wei Chu 《International Journal of Circuit Theory and Applications》2016,44(5):996-1011
In this paper, a new soft switching direct current (DC)–DC converter with low circulating current, wide zero voltage switching range, and reduced output inductor is presented for electric vehicle or plug‐in hybrid electric vehicle battery charger application. The proposed high‐frequency link DC–DC converter includes two resonant circuits and one full‐bridge phase‐shift pulse‐width modulation circuit with shared power switches in leading and lagging legs. Series resonant converters are operated at fixed switching frequency to extend the zero voltage switching range of power switches. Passive snubber circuit using one clamp capacitor and two rectifier diodes at the secondary side is adopted to reduce the primary current of full‐bridge converter to zero during the freewheeling interval. Hence, the circulating current on the primary side is eliminated in the proposed converter. In the same time, the voltage across the output inductor is also decreased so that the output inductance can be reduced compared with the output inductance in conventional full‐bridge converter. Finally, experiments are presented for a 1.33‐kW prototype circuit converting 380 V input to an output voltage of 300–420 V/3.5 A for battery charger applications. Copyright © 2015 John Wiley & Sons, Ltd. 相似文献
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