Analysis of phase accuracy in CMOS quadrature LC oscillators

Using an analytical approach, new estimation of phase error in LC-Tank quadrature oscillators is proposed. The mismatches between passive components of LC tanks are considered as the reasons of the phase error. Closed form equations relating LC mismatches to phase errors are presented. Decreasing quality factor (Q) and increasing coupling factor (k) causes phase error be less sensitive to mismatches in LC tanks. On the other hand phase noise is inversely proportional to quality factor (Q), and directly proportional to coupling factor (k), so there is a tradeoff between phase noise and phase error. To evaluate the analysis, a 5 GHz quadrature LC-Tank oscillator is simulated using TSMC 0.18 μm model technology. The results confirm the simplicity and high accuracy of the proposed analysis.     

Continuous phase quadrature phase shift keyed signaling techniquewith coding

A continuous phase quadrature phase shift keyed (CPQPSK) modulation technique is presented. This method utilizes a conventional QPSK modulator and a phase trajectory converter to approximate M=4, h=1/4 continuous phase signal and allows low cost, low complexity, and high rate (>1 Gbit/s) CPM modem implementation for bandwidth efficient transmission through nonlinear satellite channels. Using a communications analysis computer program it has been found that CPQPSK has 99 percent out-of-band power of 0.8R (MSK has 99 percent out-of-band power of 1.2 R where R is defined as bit rate), continuous phase trajectories, and nearly constant envelope amplitude. Simulation of realistic hardware designs indicate that the CPQPSK will require an Eb/No of 14 dB to achieve a bit error rate (BER) of 10^-6. Forward error correcting techniques using block codes with an overhead of 10 percent indicate that the Eb/No requirements can be reduced to 11.2 dB for 10^-6 BER     

Coherent quadrature phase shift keying optical communication systems

Coherent optical fiber communications for data rates of 100 Gbit/s and beyond have recently been studied extensively because high sensitivity of coherent receivers could extend the transmission distance. Spectrally efficient modulation techniques such as M-ary phase shift keying (PSK) can be employed for coherent optical links. The integration of multi-level modulation formats based on coherent technologies with wavelength-division multiplexed (WDM) systems is vital to meet the aggregate bandwidth demand. This paper reviews coherent quadrature PSK (QPSK) systems to scale the network capacity and maximum reach of coherent optical communication systems to accommodate traffic growth.     

带自适应体偏置的宽带LC VCO自动幅度控制策略

为了优化宽带LC型压控振荡器（LC VCOs）相位噪声性能,提出一种自动幅度控制策略。该策略结合了自适应体偏置和数字校准。当VCO开始工作时,自适应体偏置技术使VCO在不同的工艺角、电压和温度（PVT）情况下快速起振。当谐振频率变化时,在自适应体偏置和数字校准的作用下,VCO的谐振幅度被控制在最优值附近,达到优化相位噪声的目的。在TSMC 0.18μm CMOS工艺中,覆盖频率范围为1.6～3.2GHz的宽带LC VCO用来验证该幅度控制策略的可行性。基于SpectreRF的仿真结果表明LC VCO的幅度变化率降低90%,且在3.2GHz谐振频率,10kHz频率偏移处的相位噪声改善8.2dB。     

Analysis and design of injection-locked LC dividers for quadrature generation

Injection-locked LC dividers for low-power quadrature generation are discussed in this paper. Modeling the circuits as regenerative frequency dividers leads to very simple analytical expressions for the locking band, phase deviation from quadrature and phase noise. Maximizing the ratio between the injected and the biasing current is beneficial to all the above parameters whereas reducing the tank quality factor improves locking band and quadrature accuracy, though at the expense of current consumption, for given output amplitude. To validate the theory, experiments have been carried on a 0.18-/spl mu/m CMOS direct conversion IC, embedding an injection-locked quadrature generator, realized for the Universal Mobile Telecommunication System. Frequency locking range as large as 24% and phase deviation from quadrature around 0.8/spl deg/ are measured while each divider consumes 2 mA. The phase noise of the quadrature generator is determined by the driving oscillator phase noise because the dividers contribution is easily made negligible up to hundreds of megahertz offset.     

Direct quadrature phase shift keying modulator using six-port technology

A direct quadrature phase shift keying modulator based on six-port technology is presented. The modulator comprises a six-port circuit, a switch matrix and open and short terminations. Using this modulator, direct phase shift keying modulation was achieved. Six-port technology has the advantage of signal integrity, low power consumption and physical scalability to attain different frequencies of operation and extendibility to M-ary phase shift keying. Experiment results demonstrate performance with an output phase difference from 0.8 to 4.5/spl deg/ and an amplitude difference from 0.5 to 2.7 dB. A data throughput of 200 Mbits was attained.     

Concepts and methods in optimization of integrated LC VCOs

Underlying physical mechanisms controlling the noise properties of oscillators are studied. This treatment shows the importance of inductance selection for oscillator noise optimization. A design strategy centered around an inductance selection scheme is executed using a practical graphical optimization method to optimize phase noise subject to design constraints such as power dissipation, tank amplitude, tuning range, startup condition, and diameters of spiral inductors. The optimization technique is demonstrated through a design example, leading to a 2.4-GHz fully integrated, LC voltage-controlled oscillator (VCO) implemented using 0.35-μm MOS transistors. The measured phase-noise values are -121, -117, and -115 dBc/Hz at 600-kHz offset from 1.91, 2.03, and 2.60-GHz carriers, respectively. The VCO dissipates 4 mA from a 2.5-V supply voltage. The inversion mode MOSCAP tuning is used to achieve 26% of tuning range. Two figures of merit for performance comparison of various oscillators are introduced and used to compare this work to previously reported results     

On the quadrature accuracy of in-phase coupled quadrature LC oscillator

In this article, closed-form equations are proposed for phase and amplitude errors of an in-phase coupled quadrature LC oscillator. First of all, the injected current from coupling network to switching one is analytically calculated in a novel approach. Then, fundamental equations are obtained to derive phase and amplitude errors which are results of mismatches of the tank's inductors, capacitors and resistors. The analysis shows that the LC tank's phase of this oscillator has a negligible deviation from zero that is desirable and causes low phase noise. Also, the study indicates that in-phase coupling of this structure generates an injection current that reduces the output current magnitude. In the following, a mechanism is proposed to compensate the phase error, using intentional mismatch in tail currents. Moreover, In contrast to previous works, there is not a considerable trade-off between phase error and phase noise; meaning phase noise is almost stable while phase error dramatically decreases. Next, Many simulations have been done in TSMC 0.18 μm to evaluate the proposed analytical equations and efficiency of the presented approach. Finally, all of these tests confirm the high accuracy of equations and capability of the mentioned technique.     

Comparative study of gigahertz CMOS LC quadrature voltage-controlled oscillators with relevance to phase noise

This review paper presents a comparative study of published integrated submicron CMOS quadrature voltage-controlled oscillator designs, based on LC resonator tanks operating at gigahertz frequencies. Although special reference to phase noise reduction is made, the comparison also concerns issues such as power consumption, tuning range and the phase accuracy of the quadrature signals. The effect of supply voltage reduction on the choice of the oscillator topology is also included in the discussion.     

On the phase-noise and phase-error performances of multiphase LC CMOS VCOs

This paper presents an analysis of phase noise in multiphase LC oscillators, and measurement results for several CMOS quadrature-voltage-controlled-oscillators (QVCOs) working in the 2-GHz frequency range. The phase noise data for a so-called BS-QVCO (-140 dBc/Hz or less at 3 MHz frequency offset from the carrier, for a power consumption of 20.8 mW and a figure-of-merit of 184 dBc/Hz) show that phase noise performances are close to the previously derived limits. A systematic cause of departure from ideal quadrature between QVCO signals is also analyzed and measured experimentally, and a compact LC-tank layout that removes this source of phase error is proposed. A TS-QVCO designed with this technique shows a phase-noise figure-of-merit improvement of 4 dB, compared to a previous implementation. The measured equivalent phase error for all QVCOs is between 0.6/spl deg/ and 1/spl deg/.     

Analysis and design of a 1.8-GHz CMOS LC quadrature VCO

This paper presents a quadrature voltage-controlled oscillator (QVCO) based on the coupling of two LC-tank VCOs. A simplified theoretical analysis for the oscillation frequency and phase noise displayed by the QVCO in the 1/f/sup 3/ region is developed, and good agreement is found between theory and simulation results. A prototype for the QVCO was implemented in a 0.35-/spl mu/m CMOS process with three standard metal layers. The QVCO could be tuned between 1.64 and 1.97 GHz, and showed a phase noise of -140 dBc/Hz or less across the tuning range at a 3-MHz offset frequency from the carrier, for a current consumption of 25 mA from a 2-V power supply. The equivalent phase error between I and Q signals was at most 0.25/spl deg/.     

Analysis and design of phase shift full bridge converter with series-connected two transformers

A new phase shift full bridge (PSFB) converter with series-connected two transformers is proposed. The proposed converter shows wide zero voltage switching (ZVS) ranges and no output inductor is needed since each transformer individually acts as an inductor or a transformer during different times of the switching cycle. The operational principle, large signal modeling, and design equations are presented. Experimental results demonstrate that the proposed converter can achieve a significant improvement in the efficiency for a 100W (5 V, 20 A) telecommunication on-board power supply.     

Partial response quadrature differential phase shift keying (PR-QDPSK): spectrally efficient linear modulation for personal communications

A novel linear modulation technique is proposed for land mobile radio and cordless telephony applications. Excellent spectral efficiency is achieved since the transmitted signal fits entirely within a channel spacing equal to the bit rate, while yielding good performance for both coherent and noncoherent detectors.<>     

Design and analysis of an ultra-low-power LC quadrature VCO

This paper presents the design of an ultra-low-power LC quadrature VCO (QVCO). It is designed in a single-poly seven-metal 65-nm CMOS process. Several aspects of state-of-the-art QVCO design are addressed, for example tank design and circuit topologies in nano-meter CMOS technology. To minimize power dissipation, an inductor with a high LQ product of 188 nH at 2.4 GHz, and a self-resonant frequency (f _SR ) of 3.8 GHz, was designed. According to post-layout simulations, the power dissipation is below 300 μW at a 0.6 V supply. At this supply, the simulated tuning range and phase noise at 1 MHz offset are 10.3% (2.26–2.5 GHz) and −109.6 dBc/Hz respectively. The phase noise figure of merit (FoM) is better than 182.5 dB at all supply voltages of interest, which is competitive to other state-of-the-art QVCOs.     

Large-signal analysis of MOS varactors in CMOS -G/sub m/ LC VCOs

MOS varactors are used extensively as tunable elements in the tank circuits of RF voltage-controlled oscillators (VCOs) based on submicrometer CMOS technologies. MOS varactor topologies include conventional D = S = B connected, inversion-mode (I-MOS), and accumulation-mode (A-MOS) structures. When incorporated into the VCO tank circuit, the large-signal swing of the VCO output oscillation modulates the varactor capacitance in time, resulting in a VCO tuning curve that deviates from the dc tuning curve of the particular varactor structure. This paper presents a detailed analysis of this large-signal effect. Simulated results are compared to measurements for an example 2.5-GHz complementary -G/sub m/ LC VCO using I-MOS varactors implemented in 0.35-/spl mu/m CMOS technology.     

A subharmonically injected LC delay line oscillator for 17-GHz quadrature LO generation

An injection-locked delay line oscillator multiplies a 5-6-GHz input by 3 to generate I/Q LO signals for 17-GHz wireless networking applications. I/Q errors caused by asymmetric injection are minimized by symmetric injection via a passive polyphase prefilter. Passive delay lines set the measured free-running frequency of the LC ring oscillator to 16.24 GHz. The measured locking range for a 0 dBm (50 /spl Omega/) input is 14.6-17.86 GHz. Input-to-output phase noise degradation is negligible, and I/Q amplitude and phase errors are <0.17 dB and <2/spl deg/, respectively. Power consumption of the 1.2/spl times/1.4 mm/sup 2/ 0.2 /spl mu/m SiGe BiCMOS testchip (excluding buffers) is 22 mW at 2.2 V.     

Silicon based on-chip antenna using an LC resonator for near-field RF systems

This paper presents the silicon based on-chip antenna using a LC resonator. The proposed antenna consists of a stacked capacitor and a spiral inductor on silicon substrate. The spiral inductor structure without underpass was proposed for improvement the performance of the silicon based-antenna. The resonant frequency of the fabricated antenna was measured as 465 MHz. Its return loss was 23.4 dB at resonant frequency. The antenna has a gain of ?35.75 dBi due to small size and silicon substrate. However, the fabricated antenna has good performance in the near-field.     

一种新型片式LC谐振器的理论分析

分析了Bi系铜氧化物的晶体结构特点,提出可以利用此晶体作为LC谐振器。计算了它的振荡频率,发现直径为2mm圆片状晶体的谐振频率在6kHz左右。影响振荡频率的主要因素为εr、结构常数c和晶体ab面面积S。     

The effect of varactor nonlinearity on the phase noise ofcompletely integrated VCOs

This work discusses variations in phase noise over the tuning range of a completely integrated 1.9-GHz differential voltage-controlled oscillator (VCO) fabricated in a 0.5-μm bipolar process with 25-GHz f _t. The design had a phase noise of -103 dBc/Hz at 100 kHz offset at the top of the tuning range, but the noise performance degraded to -96 dBc/Hz at 100 kHz at the bottom of the tuning range. It was determined that nonlinearities of the on-chip varactors, which led to excessively high VCO gain at the bottom of the tuning range, were primarily responsible for this degradation in performance. The VCO has a power output of -5 dBm per side. Calculations predict phase noise with only a small error and provide design insight for minimizing this effect. The oscillator core drew 6.4 mA and the output buffer circuitry drew 6 mA, both from a 3.3-V supply     

锁相环精密正交移相器的设计

本文分析了锁相环路的噪声性能,给出了锁相环精密正交移相器的设计方法,并以30MHz正交移相器为例,介绍了设计步骤。实测结果表明,该移相器的正交移相误差仅为0.05°。