A 16 MHz, 59.2 ppm/°C CMOS DLL-Assisted VCO with Improved Frequency Stability Towards Single Chip Wireless IOT

A 16 MHz, highly stable voltage controlled oscillator (VCO) is reported in this paper. The proposed VCO consists of three cross-coupled RC stages, and is fully compatible with standard CMOS process. A positively biased PN junction with negative temperature coefficient is incorporated in the design to compensate frequency drift. In addition, a delay locked loop (DLL) directly following the VCO is utilized to further improve the output stability caused by temperature variations. The designed circuit was implemented using CMOS 0.18 μm technology, and was validated through experiments. Measurement results show that the DLL-assisted VCO output variation across the 25~120 °C temperature range is less than 0.56 %, corresponding to 59.2 ppm/°C. It also shows that the output standard deviation of the DLL-assisted VCO is only 6.816 KHz, ~ 16.6 % better compared with the same VCO without DLL’s assistance.     

A high performance 1 GHz voltage controlled oscillator using neural system architecture

In this paper, an improved voltage controlled oscillator scheme with temperature compensated frequency, a wide linear range, low phase noise and low power dissipation is presented for application in transmitting signals of gas sensors from mines using RF communication. The basic unit of the oscillator is a ring based differential amplifier incorporating temperature compensated voltage dependent PMOS capacitors and standard PMOS triode connected load with temperature compensated biasing scheme. The increased nonlinearity in the presence of PMOS capaciors is reduced to 0.001% using a digitally programmable neural architecture which is simulated in the mixed signal domain of SYNOPSYS. Additionally, the temperature compensated PMOS capacitor improves the sensitivity of the VCO and the standard temperature compensated biasing scheme of the PMOS triode connected load reduces the drift in amplitude with temperature variation. The PMOS varactor lowers the phase noise of the VCO compared to parasitic capacitors without increasing the power dissipation. The entire VCO is designed using 0.18 μm typical technology of TSMC with 1.8 V power supply. The tuning range of the VCO is 0.3–1.7 V, maximum frequency is 1 GHz with a linear change of around 750 MHz, temperature sensitivity and power consumption are around 50 ppm/°C and 2 mW respectively. The phase noise is obtained to be around −123dBc/Hz at 1 MHz offset frequency.     

2.45-GHz-CMOS temperature compensated multi-controlled oscillator for IEEE 802.15 wireless PAN

A 2.45 GHz Multi-Controlled Oscillator (MCO) has been designed using a CMOS 0.28 μm STMicroelectronics technology for use in frequency synthesizer and open loop FSK modulation circuit in multi-band IEEE 802.15 Wireless Personal Area Network (PAN) applications. Simple structure allowing multiple frequency control has been adopted so that the VCO maintains its center frequency and tuning range throughout ?40°C to 120°C by the way of a Proportional To Absolute Temperature (PTAT) biasing scheme. Simulations and measurements show the sensitivity of the VCO center frequency has been reduced from 1300 ppm/°C to 73 ppm/°C, while a phase noise of ?96 dBc/Hz @ 1 MHz offset with a power consumption of 18 mW have been achieved.     

A high-order curvature compensation technique for bandgap voltage reference using subthreshold MOSFETs

A bandgap voltage reference with high-order curvature compensation is presented in this study. It exploits subtraction and derivative equalisation of currents generated from two complementary NMOS and PMOS bandgap references (BGRs) using subthreshold MOSFETs. By equating the derivative with respect to temperature of the two currents, generated by the complementary bandgaps, and subtracting these currents, an accurate high-order curvature compensation is achieved. To overcome problems due to the limited input common-mode range of opamps used in BGRs, a transimpedance amplifier with new accurate current compensation that tracks the temperature variation is proposed. This bandgap is implemented using the 0.18 μm CMOS process with a supply voltage as low as 0.7 V. At 0.8 V power supply and an output reference voltage of 386 mV, the proposed circuit achieves a temperature coefficient of 19 ppm/°C from 0 to 130°C. The power consumption is 119 μW and the power supply reduction ratio is 24 dB at 1 kHz.     

A Temperature Compensated CMOS Ring Oscillator for Wireless Sensing Applications

This paper presents a CMOS voltage controlled ring oscillator (VCO) with temperature compensation circuit suitable for low-cost and low-power MEMS gas sensor. This compensated ring oscillator is dedicated to Chopper Stabilized CMOS Amplifier (CHS-A). To operate at low frequency, a control voltage generated by a CMOS bandgap reference (BGR) is described and the measurement results of the fabricated chips are presented. The output voltage of the reference is set by resistive subdivision. In order to achieve small area and low power consumption, n-well resistors are used. This design features a reference voltage of 1 V. The chip is fabricated in AMS 0.35 μm CMOS process with an area of 0.032 mm². Operating at 1.25 V, the output frequency is within 200?±?l0 kHz over the temperature range of ?25 °C to 80 °C with power consumption of 810 μW.     

A resistorless CMOS bandgap reference with low temperature coefficient and high PSRR

A novel bandgap reference (BGR) with low temperature and supply voltage sensitivity without any resistor, which is compatible with standard CMOS process, is presented in this article. The proposed BGR utilises a differential amplifier with an offset voltage proportional to absolute temperature to compensate the temperature drift of emitter–base voltage. Besides, a self-biased current source with feedback is used to provide the bias current of the BGR core for reducing current mirror errors dependent on supply voltage and temperature further. Verification results of the proposed BGR implemented with 0.35?µm CMOS process demonstrate that a temperature coefficient of 10.2?ppm/°C is realised with temperature ranging from ?40°C to 140°C, and a power supply rejection ratio of 58?dB is achieved with a maximum supply current of 27?µA. The active area of the presented BGR is 160?×?140?µm².     

0.75 V supply nanowatt resistorless sub-bandgap curvature-compensated CMOS voltage reference

This work presents a resistorless self-biased and small area sub-bandgap voltage reference that works in the nano-ampere consumption range with 0.75 V of power supply. The circuit applies a curvature compensation technique that allows an extended temperature range without compromising the temperature stability. The behavior of the circuit is analytically described, and a design methodology is proposed which allows the separate adjustment of the bipolar junction transistor bias current and its curvature compensation. Simulation results are presented for a 180 nm CMOS process, where a reference voltage of 469 mV is designed, with a temperature coefficient of 5 ppm/°C for the ?40 to 125 °C extended temperature range. The power consumption of the whole circuit is 16.3 nW under a 0.75 V power supply at 27 °C. The estimated silicon area is 0.0053 mm².     

A low power CMOS voltage reference generator with temperature and process compensation

A low power CMOS voltage reference with process compensation is presented in TSMC 0.18-μm standard CMOS technology. Detailed analysis of the process compensation technique is discussed. The circuit is simulated with Spectre. Simulation results show that, without any trimming procedure, the output voltage achieves a maximum deviation of 0.35 % across different process corners. The temperature coefficient of the proposed circuit is 12.7 ppm/°C in a temperature range from ?40 to 85 °C and the line sensitivity is 0.036 mV/V with a supply voltage range from 1.2 to 2.5 V under typical condition. The maximum supply current is 390.4 nA at maximum supply voltage and ?40 °C. The power supply rejection ratio is ?68.3 dB at 100 Hz and 2.5 V without any filtering capacitor.     

Ultrastable integrated CMOS oscillator

An ultrastable integrated CMOS oscillator capable of replacing crystal oscillators in many applications is presented. A stability of 7ppm°C^?1 has been obtained between ? 40 and + 100^°C by employing a novel thermal compensation scheme based on the thermal properties of MOS transistors operated near their point of zero temperature coefficient. The frequency and thermal stability can be precisely adjusted with two ordinary external resistors or with two on-chip resistors. The power supply sensitivity can be made nearly zero in specified voltage ranges determined during construction.     

Development of Broad Band VCO at Ka-Band

A broad band VCO has been developed at Ka-band for FMCW Radar applications. To achieve a wide range of frequency variation, VCO has been designed in series configuration. Design steps have been presented. VCO exhibits a tuning range of 600 MHz with the power output of 50 mw, when the controlled varactor voltage varies from 7.5 volts to 15 volts. Frequency drift with temperature has been contained within 30 MHz using a proportionally controlled DC heater module over the temperature range of 0°C to +55°C. Phase Noise of the oscillator measured at the mid and extreme frequencies is about -70 dBc/kHz at 10 kHz away from the carrier. The experimental circuit and measured performance is also presented.     

A 1.3 ppm/°C BiCMOS bandgap voltage reference using piecewise-exponential compensation technique

A high-order curvature-compensated BiCMOS bandgap voltage reference using piecewise-exponential compensation technique is presented in this paper. The circuit utilizes a variable gain current mirror to realize exponential compensation as well as a common emitter amplifier with local feedback to achieve a second correction. Implemented in 0.5-μm BCD process, the proposed voltage reference consumes a supply current of 17.5 μA at 2.5 V. A temperature coefficient(TC) of 1.3 ppm/°C, PSRR of more than 76 dB at low frequencies and a line regulation of 160 ppm/V from 2.5 to 5 V are easily achieved, which make it applied widely in portable equipments.     

A low-power spread-spectrum clock generator with three-step frequency and VCO gain calibration for serial-ATA applications

This paper presents a low power ring oscillator-based spread-spectrum clock generator with three-step frequency and voltage-controlled oscillator (VCO) gain calibration for S-ATA applications. To meet the low jitter requirements with a small VCO gain, a ring-type VCO with three step frequency calibration and gain calibration scheme is proposed. The proposed coarse tuning method selects the optimal tuning currents and capacitances of the ring VCO to optimize the phase noise. The gain of ring-type VCO can be reduced and kept constant with the proposed three-step frequency and VCO gain calibration. As a result, it can improve the phase noise characteristics of the ring-type VCO and make it more robust to the PVT variations. Also, charge pump up/down current mismatches are compensated with the current mismatch compensation block. This chip is fabricated with 65 nm CMOS technology, and the die area is 430 × 460 μm². The power consumption is 12 mW at 1.2 V supply voltage. The measured RMS jitter and phase noise are 2.835 ps and ?96.83 dBc/Hz at 1 MHz offset, respectively.     

Linear frequency modulation of voltage-controlled oscillator using delay-line feedback

This letter proposes a structure for a voltage-controlled oscillator (VCO) circuit which operates in a frequency range of 4.0-4.3 GHz and can achieve a highly linear frequency sweep without any additional compensation circuit. The VCO consists of an amplifier and a feedback circuit only. The feedback circuit compensates for the phase delay of a transmission line with a varactor and sets the closed-loop phase change close to 360/spl deg/. The measured maximum deviation from a linear frequency sweep is /spl sim/1.2 MHz when the varactor capacitance C/sub V/ of the VCO is related to the control voltage V/sub C/ by C/sub V//spl prop/V/sub C//sup -1.06/. The spectral distribution of the beat frequency between the VCO output and delayed VCO output shows that the proposed VCO has excellent linearity in frequency modulation.     

Thermistor controlled gunn oscillator at Ka-band

Frequency drift of Gunn oscillators is a major cause of concern in most of the Millimeter wave communication systems. This paper describes a simple and cost effective technique to arrest the frequency drift of a Ka band Gunn oscillator within 15 MHz for the operating temperature range of 0°C to 60°C as against a typical drift of about 50 to 100 MHz for free running Gunn oscillator for the same temperature range. At the ambient, the oscillator remains within ±1 MHz from switching on to stabilization. The temperature variation is sensed with a small thermistor bead placed close to the diode and a correction voltage is applied to the bias to compensate for the frequency drift. This compensation circuit also takes into account the non-linear behaviour of the thermistor and the Gunn oscillator with the temperature.     

A 6-GHz capacitively-coupled Colpitts CMOS quadrature voltage controlled oscillator

In this work a new low-noise low-power Colpitts quadrature voltage controlled oscillator (QVCO) made by coupling two identical current-switching differential Colpitts voltage controlled oscillators (VCO) is proposed; coupling of the VCOs is done using some capacitors in an “in-phase anti-phase” scheme. In this coupling configuration first harmonics (as well as higher harmonics) from each VCO are injected to the other VCO, as opposed to coupling schemes in which only even harmonics are injected. An analysis of the linearized circuit which confirms 90° phase difference between output signals of the proposed circuit is presented. Since no extra noise sources or power consumption are introduced to the core VCOs, the proposed QVCO achieves low phase noise performance and low power consumption. The proposed circuit is designed and simulated in a commercial 0.18 μm CMOS technology. The simulated phase noise of the proposed QVCO at 3 MHz offset frequency is ?138.3 dBc/Hz, at 6 GHz. The circuit dissipates 8.16 mW from a 1.8 V supply and its frequency can be tuned from 5.6 to 6.3 GHz.     

A novel sub-1V bandgap reference with offset compensated techniques

A sub-1V bandgap reference (BGR) featuring with low offset is proposed. In order to reduce the effect of the offset of the operation amplifiers, the proposed BGR introduces feedback paths to not only realize sub-1V output but also reduce the factor of operation amplifier’s offset voltage. In addition, a cross-coupled structure is dedicated to reduce the offset voltage factor further by increasing the bipolar junction transistor’s base emitter voltage difference. The new proposed offset-compensated BGR has been successfully verified in a 0.5 μm BCD process. The relative accuracy is increased by 4 times compared with the conventional circuit. Furthermore, the proposed circuit achieves a temperature coefficient of 8.5 ppm/°C over a wide temperature range of ?20 to 120 °C, power supply rejection ratio of more than 70 dB at low frequencies and a line regulation of 0.09 % easily, without requiring additional operational amplifiers or complex circuits.     

A 2.87 ppm/°C 65 nm CMOS bandgap reference with nonlinearity compensation

Based on the review and analysis of two recently reported low temperature coefficient (TC) bandgap voltage references (BGRs), a new temperature compensation technique is presented. With the double-end piecewise nonlinearity correction method, the logarithm cancellation technique and the mixed-mode output topology, a BGR with high-temperature stability is realised based on 65?nm CMOS low-leakage process. The post-simulation results using Spectre show that this BGR produces an output voltage of about 953?mV with 2.5?V supply voltage, and the output voltage varies by only 0.16?mV from ?40°C to 125°C. This low TC BGR has been used in a 65?nm CMOS touch screen controller, and the measurement shows that the output voltage of this BGR is about 949?mV varying by 0.44?mV from ?40°C to 125°C. The TC of this BGR is about 2.87?ppm/°C, meeting the requirement of high-precision SoC application.     

与工艺、电源电压和温度无关的低功耗振荡环设计

分析了传统片外时钟和片内时钟各自的特点和应用背景,在Chartered 0.35μm CMOS工艺下实现了一个低功耗PVT(工艺、电源电压、温度无关)振荡环,对片内时钟的稳定性和功耗进行改进。该振荡环无需精准的电压源,采用了误差补偿技术,通过偏置电压和延时单元的相互补偿,使得振荡频率对于工艺、温度和电源电压均有较大的容差能力。并且由于针对延时单元补偿的方式,令周期大小易于调整。蒙特卡罗仿真显示,工艺误差引起的偏差要比补偿前的偏差减小了60%。流片测试结果表明,在工作温度变化范围0~100°C时,振荡环输出的频率偏差为±3.22%;在电源电压变化范围为2.8~3.8 V时,振荡环输出的频率偏差为±3.36%;在电源电压3.3 V的情况下,整个芯片消耗的电流为950μA。     

A sub-1-V, high precision, ultra low-power, process trimmable, resistorless voltage reference with low cost 90-nm standard CMOS technology

A low power voltage reference generator operating with a supply voltage ranging from 1.6 to 3.6?V has been implemented in a 90-nm standard CMOS technology. The reference is based on MOSFETs that are biased in the weak inversion region to consume nanowatts of power and uses no resistors. The maximum supply current at 3.6?V and at 125°C is 173?nA. It provides a 771?mV voltage reference. A temperature coefficient of 7.5?ppm/°C is achieved at best and 39.5?ppm/°C on average, in a range from ?40 to 125°C, as the combined effect of a suppression of the temperature dependence of mobility and the compensation of the threshold voltage temperature variation. Several process parameters affect the performance of the proposed voltage reference circuit, so a process adjustment aimed at correcting errors in the reference voltage caused by these variations is dealt with. The total block area is 0.03?mm².     

Temperature compensated CMOS ring VCO for MEMS gas sensor

This paper presents a CMOS voltage controlled ring oscillator with temperature compensation circuit suitable for low-cost and low-power gas sensor. To operate at low frequency, a control voltage generated by a CMOS bandgap reference is described and the measurement results of the fabricated chips are presented. The output voltage of the reference is set by resistive subdivision. In order to achieve small area and low power consumption, n-well resistors are used. This design features a reference voltage of 1 V. The chip is fabricated in AMS 0.35 μm CMOS process with an area of 0.032 mm². Operating at 1.25 V, the output frequency is within 200 ± l0 kHz over the temperature range of ?25 to 80 °C with a power consumption of 810 μW.