16路语音压缩编解码并行处理的实现

根据标准在单芯片上实现了路语音压缩编解码并行处理,从而完成了数字录音中继卡的关键软件部ITU-T G.723.1TMS320C620116分。结合算法特点进行了算法优化,语言级和汇编级的分别优化,以减少计算复杂度和所需存储空间。并给出了达到的性能指标。G.723.1C最后通过了全套检测矢量。     

Introduction to AVS Audio

This paper describes a general audio coding algorithm which has been recently standardized by AVS, China. The algorithm is based on a perceptual coding technique. The codec delivers near CD-quality audio at 128kb/s. This paper describes the coder structure in detail and discusses the reasons for specific design methods. A summary of the subjective test results are presented for the prototype codec. Comparison Mean Opinion Score （CMOS） test indicates that the quality of the AVS audio coder is comparable with MPEG Layer-3 audio coder. A reM-time decoder was used for the characterization test, which is based on a 16-bit fixed-point DSP. The performance of the DSP solution was demonstrated, including computational complexity and storage characteristics.     

柴油发电机数字电压调节技术研究

发电机调压器是维持柴油机组正常运行不可缺少的重要部分,对机组的安全稳定运行起到重要作用。目前,主要存在基于晶体管式的模拟调压器以及基于微处理器的数字调压器两种。鉴于数字调压器具有传统的模拟式调压器无法比拟的优势,本文针对某型车辆柴油发电机设计了基于TMS320F28335芯片的数字电压调节器。设计了数字电压调节器的输入输出接口电路,包括模拟量调理电路、数字量调理电路、励磁主电路和励磁驱动电路等,制作功率板。采用以TMS320F28335为核心的DSP最小系统作为核心控制器,利用电压、励磁电流双环调节的方式,采用复合PID控制算法。搭建系统实验平台,对调压器进行测试,满足预期功能要求。     

用EPROM实现某数字解码器的研制

介绍了一台能检测出64路站点编码的数字解码器，我们使用EPROM芯片作为关键“数码转换”手段，作为七段字符显示译码器的BCD编码器。该装置简洁巧妙，内部结构流畅，可靠性高，在实际应用中获得了用户满意的效果。     

电力机车主变压器综合自动测试系统

电力机车主变压器综合自动测试系统足具有多功能的综合大型试验设备,在本系统中,采用工业控制计算机作为上位机控制测试系统的所有试验过程和试验数据记录,可编程序控制器PLC完成各试验功能模块的切换,智能数字化仪表实现模拟量的转换和传输,系统工作稳定、准确,自动化程度高,能够完成SS₇系列、SS_3B、SS_6B、SS_4G等多种车型主变压器、功率补偿电抗器、滤波、平波电抗器、电流互感器的半成品试验和出厂试验;综合自动测试系统的使用大大提高了电力机车主机厂的生产效率,同时也提升了试验过程的科学性和试验操作的安全性。     

Modeling a verification test system for mixed-signal circuits

In contrast to the large number of logic gates and storage circuits encountered in digital networks, purely analog networks usually have relatively few circuit primitives (operational amplifiers and so on). The complexity lies not in the number of building blocks but in the complexity of each block and the need to test a range of parameters-for example, gain, bandwidth, and signal-to-noise ratio. Degraded circuit performance as well as nonfunctional operation must be checked. Thus, circuit complexity rather than volume complexity is the dominant problem in analog test, and testing mixed-signal circuits entails more difficulties than testing purely digital circuits. In IC manufacturing, circuits traditionally move from design to test with little thought about how each department's activities affect those of the other. This lack of foresight almost always results in iteration cycles between design and test to realize a testable design that also satisfies the specification. We need a bridge between design and test phases to enable a smooth transition. An integrated approach whereby both teams understand each other's requirements is a big step in the right direction; interaction between design and test databases significantly increases the degree to which design and test development can operate as concurrent processes; some work has already been done in this area. Our goal was to build Spice models for the instruments incorporated in the IntegraTest system so that we could simulate the tests this system conducts during design. The models are based on manufacturer specifications, and control parameters used in the models are as close as possible to those in the instruments. To make changes in the models transparent to users, entering of parameters is isolated from the models' internal construction. After building the models, we compared the results of the simulated tests with results from actual tests performed with real instruments     

Multimedia LSI accelerator with embedded DRAM

To succeed in the graphics controllers market, it is important to take advantage of embedded DRAMs, which provide low power consumption, low electromagnetic interference (EMI), smaller board space, and frame memory flexibility (capacity, access speed, and bandwidth). These capabilities benefit portable PC applications in which board space and power consumption are serious considerations. The MSM7680 accelerator is ideally suited for a compact multimedia system because of its smaller, embedded DRAM capacity. The MSM7680 provides high performance and/or a one-chip solution for many graphics display systems. It also integrates the frame buffer with graphics controller functions such as a 2D drawing engine, MPEG-1 decoder, digital/analog converter for RGB analog output, and a clock generator phase-locked loop. The MSM7680 multimedia accelerator uses a 256-bit data bus with embedded 1.25-Mbyte DRAM to increase the rate of data transfers and decrease power consumption     

基于THS1040模数转换器的测试系统设计

提出了一种针对高速高精度数模转换器的测试系统模型,该模型运用相关采样技术,利用Matlab软件和逻辑分析仪测试了模数转换器的静态性能和动态性能。与此同时,基于TI公司的THS1040设计了测试评估板。测试结果表明,这种系统测试模型测试出的性能参数与实际芯片性能参数误差不超过1.17%。该模型已应用于高速视频解码芯片的后端验证测试中。     

基于专用芯片的视频A/D变换系统设计与实现

根据视频A／D变换和混合视频解码的要求，利用专用芯片设计一个切实可行的系统方案将混合模拟视频信号分解为数字分量视频信号。系统实现后对各个系统指标进行了测量和比较，表明这个系统可以在低成本的前提下达到很高的性能。     

Optimal coding-decoding for systems controlled via a communication channel

In this article, we study the problem of controlling plants over a signal-to-noise ratio (SNR) constrained communication channel. Different from previous research, this article emphasises the importance of the actual channel model and coder/decoder in the study of network performance. Our major objectives include coder/decoder design for an additive white Gaussian noise (AWGN) channel with both standard network configuration and Youla parameter network architecture. We find that the optimal coder and decoder can be realised for different network configuration. The results are useful in determining the minimum channel capacity needed in order to stabilise plants over communication channels. The coder/decoder obtained can be used to analyse the effect of uncertainty on the channel capacity. An illustrative example is provided to show the effectiveness of the results.     

Multivariate measurement system analysis in multisite testing: An online technique using principal component analysis

Multisite testing improves manufacturing throughput and reduces costs by applying simultaneous testing to products with multiple measurement instruments in parallel. It is important to perform measurement system analysis (MSA) on a multisite testing system to assess its testing capability. Traditional MSA methods are designed to be either univariate or multivariate in a single-site system. They are not capable of analyzing a complex multisite testing system where there are multivariate measurements and multiple instruments in parallel. We propose an online multivariate MSA approach to detecting faulty test instruments in a multisite testing system. In order to pinpoint a faulty test instrument in a multisite testing system we compare the performance of each test instrument to the overall performance of all the parallel instruments in the system. A modified principal component analysis (PCA) method is proposed to transform multivariate measurement data with dependent variables into those with independent principal components. Assuming that all the instruments have the same measurement accuracy and precision we consider a faulty instrument as one whose principal component values are beyond the three sigma control limits of the principal component values of all instruments. We conduct an experiment to provide empirical evidence that the proposed approach is capable of identifying the faulty instruments in a multisite testing system. This approach can be implemented as an online monitoring technique so that production is not interrupted until a faulty instrument is identified.     

模数转换器的辐射性能及其试验测试技术研究

介绍了国内外对模数转换器(ADC)抗辐射性能试验测试技术的研究现状以及相关结论。在此基础上提出实时测量模数转换器在辐射环境下工作的动态性能参数来表征器件抗辐射性能的研究思路,同时也提出了对现有模数转换器辐射性能测试系统的改进建议。     

基于FPGA的便携式导弹快速测试方法研究

针对当前导弹测试方法繁琐复杂、测试效率较低等问题,同时结合导弹快速发射等实际需求。论文提出了一种基于FPGA的便携式测试方法研究。该方法以Cyclon IV FPGA芯片作为核心数据综合处理单元,核心处理单元采用双核处理器架构,搭载对应的通信板、模拟量以及数字量板卡,分别完成对应的测试指令发送和对应的数据采集,数据处理软件采用采用uc/OS II操作系统完成任务整个系统任务调度。同时采用便携式智能数据终端来实施查看并自主分析测试数据。实验表明该方法,可降低测试设备体积、降低测试方法复杂度同时提高测试效率,从而实现实现快速发射。     

一种数字变换器的仿真模型及性能补偿算法

随着伺服系统智能化程度越来越高，对模拟量传感器的数字化要求也越来越高。目前模拟量传感器由于自身限制只能通过数字变换器实现数字化。构建了一种数字变换器的仿真模型，通过工控机和定制板卡模拟中心控制系统发送、采集数字信号，方便验证数字变换器性能；针对传感器数字化过程中性能变差、信号传输速率高的特点，详细给出了数字变换器的性能补偿的算法和补偿流程，并通过补偿软件实现。通过实际测试，验证了传感器数字化的性能及传输速度。实验测试结果表明，补偿后的传感器性能指标满足伺服系统的需求，具有一定的应用价值和可推广性。     

H.263+视频编解码器中去方块效应滤波器的性能测试

H．263／H．263 是基于宏块或块的离散余弦变换和带运动补偿的预测编码相结合的混合编码方法,在解码端恢复出来的图像会产生方块效应。H．263 可选模式中提出了一种去方块效应滤波器,通过在测试模型TMN8上对其性能进行的测试以及测试数据的分析和比较,表明该滤波器可改善块效应现象,提高图像的主观质量,具有较高的实用价值,可应用在H．263 视频编解码器中。     

模拟电路边界扫描功能性测试模型研究

边界扫描技术在数字电路中已经基本成熟,但在模拟电路中还涉足较少。为了提高模拟电路系统的可靠性和可测性设计,对模拟电路面向功能性测试的边界扫描模型进行了研究,结合IEEE1149.1标准框架结构和IEEE1149.4标准混合信号测试总线思想,提出了利用数字寄存器控制模拟开关的边界扫描单元结构,设计了面向功能测试的模拟电路边界扫描模型,简化了测试存取口,降低了测试难度,同时构建了模型测试平台,实现了模型的功能测试功能。     

基于虚拟仪器的电路板自动测试系统设计

介绍了虚拟仪器技术及其比传统仪器的优势,美国国家仪器公司（NI）的虚拟仪器的软、硬件平台。阐述了电路板自动测试系统的硬件组成设计和软件设计方法。测试系统的硬件主要由NI公司的PXI系列板卡实现,软件由NI公司的LabVIEW开发。该自动测试系统能够全面、准确、自动地对电路板进行功能测试和故障诊断,完成对电路板测试数毋的分析统计和保存。     

Hybrid analog/digital wavelength-time optical CDMA systems in radio-over-fiber transmissions

This study presents a hybrid analog/digital (A/D) mechanism of two-dimensional (2-D) structure of wavelength-hopping and time-spreading coding optical code-division multiple-access (OCDMA) system for future generation communication and network technologies. The 2-D method increases the maximum permissible number of simultaneous base stations (BSs) and security using a finite bandwidth of optical broad-band light source (BLS). In the proposed system, we can employ low-cost BLS which can mitigate the sampling rate of optical switch (OSW) and has the advantage of power saving. The performance enhancement is using the time-spreading method by a Mach-Zehnder modulator (MZM) with switch function to suppress the phase-induced intensity noise (PIIN) effect of the wavelength domain and the receiver structure is equipped with balanced detectors in order to suppress the multiple-access interference (MAI). In addition, the hybrid OCDMA network is equipped using a dual input MZM for the choice which time analog or digital signals to be transmitted and the advantage of these two kinds of signals can transmit by the same coder/decoder (codec) mechanism and recover by different type filters in the receiver end. The numerical evaluation results demonstrate that, for analog and digital signals under PIIN- and MAI-limited conditions, the proposed system outperforms a conventional multi-wavelength and time-spreading OCDMA scheme. Hence, enhancing the confidentiality of the asynchronous networks of codeword assignments and integratable hardware designs for the scheme with a MZM, an optical switch (OSW), arrayed-waveguide grating (AWG) and fiber Bragg gratings (FBGs) in hybrid A/D 2-D OCDMA system is proposed.     

基于DSP6000数字IMU信号处理板设计

介绍了一种基于DSP6000数字IMU信号处理板设计方案,应用TI公司的TMS320C6713DSP器件为中心处理器,采用LINEAR公司的LTC1606完成模拟信号的A/D转换.详细介绍了该信号处理板硬件电路设计中各个模块的功能、组成和设计方法,并对信号处理板软件流程做了详细说明.实验结果表明,该信号处理板提高了数据处理速度、减小了系统体积和成本,同时具有实时运算能力强等优点,可支持多种补偿算法.     

继电保护CPU板卡自动测试系统及方法

分析了继电保护CPU板卡硬件功能模块组成,采用模块化和层次化思想,设计了通用性好、实用性强的CPU板卡自动测试系统,详细阐述了自动测试系统的硬件组成.按照CPU板卡硬件功能模块特点,将其分为三大类,并分别阐述了各类功能模块的测试方法和测试流程.结合具体的应用实例,介绍了该自动测试系统的应用现状,在CPU板卡生产测试中取得了良好的使用效果,极大缩短了继电保护CPU板卡生产过程中的测试时间.