Novel high PSRR high-order temperature-compensated subthreshold MOS bandgap reference

Novel high power supply rejection ratio (PSRR) high-order temperature-compensated subthreshold metal-oxide-semiconductor (MOS) bandgap reference (BGR) is proposed in Semiconductor Manufacturing International Corporation (SMIC) 0.13 μm complementary MOS (CMOS) process. By adopting subthreshold MOS field-effect transistors (MOSFETs) and the piecewise-curvature temperature-compensated technique, the output reference voltage's temperature performance of the subthreshold MOS BGR is effectively improved. The subthreshold MOS BGR achieves high PSRR performance by adopting the technique of pre-regulator. Simulation results show that the temperature coefficient (TC) of the subthreshold MOS BGR is 1.38×10^?6/°C when temperature is changed from ?40 °C to 125 °C with a power supply voltage of 1.2 V. The subthreshold MOS BGR achieves the PSRR of ?104.54 dB, ?104.54 dB, ?104.5 dB, ?101.82 dB and ?79.92 dB at 10 Hz, 100 Hz, 1 kHz, 10 kHz and 100 kHz respectively.     

一种高电源抑制比全工艺角低温漂CMOS基准电压源

基于SMIC0.35μm的CMOS工艺,设计了一种高电源抑制比,同时可在全工艺角下的得到低温漂的带隙基准电路。首先采用一个具有高电源抑制比的基准电压,通过电压放大器放大得到稳定的电压,以提供给带隙核心电路作为供电电源,从而提高了电源抑制比。另外,将电路中的关键电阻设置为可调电阻,从而可以改变正温度电压的系数,以适应不同工艺下负温度系数的变化,最终得到在全工艺角下低温漂的基准电压。Cadence virtuoso仿真表明:在27℃下,10 Hz时电源抑制比(PSRR)-109 dB,10 kHz时(PSRR)达到-64 dB;在4 V电源电压下,在-40～80℃范围内的不同工艺角下,温度系数均可达到5.6×10-6V/℃以下。     

一种带热滞回保护的高精度高电源抑制比带隙基准源

To meet the accuracy requirement for the bandgap voltage reference by the increasing data conversion precision of integrated circuits, a high-order curvature-compensated bandgap voltage reference is presented employing the characteristic of bipolar transistor current gain exponentially changing with temperature variations. In addition, an over-temperature protection circuit with a thermal hysteresis function to prevent thermal oscillation is proposed. Based on the CSMC 0.5 μ m 20 V BCD process, the designed circuit is implemented; the active die area is 0.17 × 0.20 mm². Simulation and testing results show that the temperature coefficient is 13.7 ppm/K with temperature ranging from –40 to 150 ℃, the power supply rejection ratio is –98.2 dB, the line regulation is 0.3 mV/V, and the power consumption is only 0.38 mW. The proposed bandgap voltage reference has good characteristics such as small area, low power consumption, good temperature stability, high power supply rejection ratio, as well as low line regulation. This circuit can effectively prevent thermal oscillation and is suitable for on-chip voltage reference in high precision analog, digital and mixed systems.     

A high precision high PSRR bandgap reference with thermal hysteresis protection

To meet the accuracy requirement for the bandgap voltage reference by the increasing data conversion precision of integrated circuits,a high-order curvature-compensated bandgap voltage reference is presented employing the characteristic of bipolar transistor current gain exponentially changing with temperature variations.In addition,an over-temperature protection circuit with a thermal hysteresis function to prevent thermal oscillation is proposed.Based on the CSMC 0.5μm 20 V BCD process,the designed cir...     

低成本多路输出CMOS带隙基准电压源设计

在传统Brokaw带隙基准源的基础上,提出一种采用自偏置结构和共源共栅电流镜的低成本多路基准电压输出的CMOS带隙基准源结构,省去了一个放大器,并减小了所需的电阻阻值,大大降低了成本,减小了功耗和噪声。该设计基于华虹1μm的CMOS工艺,进行了设计与仿真实现。Cadence仿真结果表明,在-40～140℃的温度范围内,温度系数为23.6ppm/℃,静态电流为24μA,并且能够产生精确的3V,2V,1V和0.15V基准电压,启动速度快,能够满足大多数开关电源的设计需求与应用。     

一种适用于宽电源电压幅度的高精度双极带隙基准电路

设计并实现了一种bipolar工艺下的高精度带隙基准电路,通过Hspice验证,具有2.28(10-6K-1的温度系数,在(V=10V的宽电源电压幅度范围作用下,具有1.2mV/V电源抑制特性及直流PSRR=79dB的高电源抑制比.     

一种低温漂的CMOS带隙基准电压源的研究

为了满足深亚微米级集成电路对低温漂、低功耗电源电压的需求,提出了一种在0.25μm N阱CMOS工艺下,采用一阶温度补偿技术设计的CMOS带隙基准电压源电路。电路核心部分由双极晶体管构成,实现了VBE和VT的线性叠加,获得近似零温度系数的输出电压。T-SPICE软件仿真表明,在3.3 V电源电压下,当温度在-20~70℃之间变化时,该电路输出电压的温度系数为10×10-6/℃,输出电压的标准偏差为1 mV,室温时电路的功耗为5.283 1 mW,属于低温漂、低功耗的基准电压源。     

一种低温漂低功耗的简易带隙基准电压设计

电压基准在模拟电路中提供一个受电源或温度等影响较小的参考电压,以保证整个电路正常工作。设计了一种低温漂低功耗带隙基准电压源,采用不受电源影响的串联电流镜做偏置．利用PTAT电压的正向温度系数和基极发射极电压的负向温度系数特性,以适当的系数加权构造零温度系数的电压量。该设计避开了运放的应用．结构简易,原理清晰,便于入门级的同学在短时间内学习掌握。0-70℃范围内,温漂系数为16．4ppm／℃。供电电压在5-6V范围内变化时,电源抑制比达57．7dB。总输出噪声为140．3μV,功耗为300．6μW。     

A sub 1 V high PSRR CMOS bandgap voltage reference

A Bandgap circuit capable of generating a reference voltage of less than 1 V with high PSRR and low temperature sensitivity is proposed. High PSRR achieved by means of an improved current mode regulator which isolates the bandgap voltage from the variations and the noise of the power supply. A vigorous analytical approach is presented to provide a universal design guideline. The analysis unveils the sensitivity of the circuit characteristic to device parameters. The proposed circuit is fabricated in a CMOS technology and operates down to a supply voltage of 1.2 V. The circuit yields 20 ppm/°C of temperature coefficient in typical case and 50 ppm/°C of temperature coefficient in worst case over temperature range −40 to 140°C, 60 ppm/V of supply voltage dependence and 60 dB PSRR at 1 MHz without trimming or extra circuits for the curvature compensation. The entire circuit occupies 0.027 mm² of die area and consumes from a 1.2 V supply voltage at room temperature. Twenty chips are tested to show the robustness of the topology and the measurement results are compared with Monte Carlo simulation and analysis.     

应用于模数转换的高精度带隙基准源

设计了一种应用于模数转换的高精度带隙基准电压源和电流源电路,利用温度补偿技术,该电路能分别产生零温度系数的基准电压VREF、零温度系数的基准电流IZTAT。仿真结果显示,采用标准0.18μm CMOS工艺,在室温27℃和2.8 V电源电压的条件下,电路工作频率为10 Hz和1 kHz时,电源抑制比(PSRR)分别为–107 dB和–69 dB,VREF及IZTAT的温度系数分别是20.6×10–6/℃和40.3×10–6/℃,功耗为238μW,可在2.4~3.6 V电源电压范围内正常工作。     

一种高PSR CMOS带隙基准电路设计

为了降低芯片电路功耗,电源电压需要不断的减小,这将导致电源噪声对基准电压产生严重影响。为此针对这一问题进行相关研究,采用SMIC 0.18μm工艺,设计出一种低功耗、低温度系数的高PSR带隙基准电压源。仿真结果表明,该设计带隙基准源的PSR在50 kHz与100 kHz分别为-65.13 dB和-53.85 dB;在2⁶ V电源电压下,工作电流为30μA,温度系数为30.38 ppm/℃,电压调整率为71.47μV/V。该带隙基准适用于在低功耗高PSR性能需求的LDOs电路中应用。     

一种二阶曲率补偿CMOS带隙基准

设计了一种采用电流求和技术的亚1V二阶曲率补偿CMOS带隙基准。基于CSMC0.5μm标准CMOS工艺对所设计的带隙基准进行了仿真验证。仿真验证结果显示:所设计的带隙基准获得了0.75V的带隙参考电压;在-25～125℃温度范围内,带隙基准参考电压的温度系数仅为2.548×10-6;当电源电压在2.6～6.2V变化时,带隙基准的输出电压变化仅0.08mV;带隙基准参考电压在10Hz,100Hz,1kHz,100kHz处分别获得-118.07dB,-107dB,-87.23dB,-47dB的电源抑制。     

高电源抑制比的CMOS亚阈值多输出电压基准

基于工作在亚阈值区的MOS器件,运用CMOS电流模基准对CATA和PTAT电流求和的思想．提出一种具有低温漂系数、高电源抑制比（PSRR）的CMOS电压基准源,该电路可同时提供多个输出基准电压,且输出电压可调。该基准源基于CSMC0．5μm标准CMOS工艺,充分利用预调节电路并改进电流模基准核心电路。使整个电路的电源抑制比在低频时达到122dB,温度系数（TC）在0-100℃的温度范围内约7ppm／℃。     

A sub-1 V high-precision CMOS bandgap voltage reference

A third-order, sub-1 V bandgap voltage reference design for low-power supply, high-precision applications is presented. This design uses a current-mode compensation technique and temperature-dependent resistor ratio to obtain high-order curvature compensation. The circuit was designed and fabricated by SMIC 0.18 μm CMOS technology. It produces an output reference of 713.6 mV. The temperature coefficient is 3.235 ppm/℃ in the temperature range of -40 to 120 ℃, with a line regulation of 0.199 mV/V when the supply voltage varies from 0.95 to 3 V. The average current consumption of the whole circuit is 49 μA at the supply voltage of 1 V.     

一种新型低功耗电流模式CMOS带隙基准设计

为了降低传统带隙基准源的功耗和面积,提出了一种新型基于电流模式高阶曲率修正的带隙基准电压源电路。通过改进的电流模式曲率校正方法实现高阶温度补偿,并且通过集电极电流差生成绝对温度成正比（PTAT）电流,而不是发射极面积差,因此所需电阻以及双极型晶体管（BJT）数量更少。采用标准0.35μm CMOS技术对提出电路进行了具体实现。测量结果显示,温度在-40～130°C之间时,电路温度系数为6.85 ppm/°C,且能产生508.5mV的基准电压。该带隙基准可在电源电压降至1.8 V的情况下工作,在100Hz时,测量所得的电路电源抑制为-65.2dB。在0.1-10 Hz频率范围内,噪声电压均方根输出为3.75 μV。相比其他类似电路,当供电电源为3.3V时,提出电路的整体静态电流消耗仅为9.8μA,面积仅为0.09 mm2。     

A resistorless CMOS current reference with temperature compensation

A resistorless CMOS current reference is presented.Temperature compensation is achieved by subtracting two sub-currents with different positive temperature coefficients.The circuit has been implemented with a Chartered0.35μm CMOS process.The output current is 1.5μA,and the circuit works properly with a supply voltage down to 2 V.Measurement results show that the temperature coefficient is 98 ppm/℃,and the line regulation is 0.45%/V.The occupied chip area is 0.065 mm~2.     

应用于低功耗型专用集成电路的超低功耗高电源抑制比电压基准源

介绍一种超低功耗、无片上电阻的带隙基准源。该带隙基准源主要用于低功耗型专用集成电路。采用Oguey电流源结构来减小静态电流,以降低功耗;采用共源共栅电流镜以提高电源电压抑制比和电压调整率。电路基于SMIC 0.18-μm CMOS工艺进行设计并流片。测试结果表明,在温度范围25℃-100℃内,温漂系数为66 ppm/℃,电源电压范围为1.8V - 3.3V时,电压调整率为0.9%,在100 Hz时,电源电压抑制比为-49 dB。电路功耗仅为200 nW,芯片面积为0.01 mm2。该电路可作为低功耗专用集成电路里的基本模块。     

温度系数连续可调的带隙基准源电路设计

为了对薄膜晶体管液晶显示器(TFT-LCD)驱动芯片的驱动电压进行温度补偿以改善TFT-LCD的性能,本文基于标准CMOS(3.3V)的chrt35rf 0.35$m工艺,设计了一款温度系数可连续调节的带隙基准电压源,其中包括核心电路、运算放大器电路和启动电路3个子模块。该电路使用MOS晶体管作为可变电阻,通过调节MOS栅极电压控制MOS漏源等效电阻的连续可变,进而改变电路中的电阻比值,实现带隙基准源的温度系数连续可调。使用Cadence的Spectre仿真器进行仿真,结果表明,在-25~125℃的工作温度范围内,带隙基准源电路的输出电压的正温度系数可连续调节范围为156.6~2 545.0ppm/℃,输出电压的负温度系数的连续变化范围为156.6~1 337.7ppm/℃,输出基准电压变化为0.95~2.67V,低频时基准电压的电源抑制比达到73.13dB。该电路实现了基准电压从负温度系数向正温度系数的连续可调节,且调节范围较大。     

一个具有温度补偿特性的无电阻CMOS电流基准源

A resistorless CMOS current reference is presented.Temperature compensation is achieved by subtracting two sub-currents with different positive temperature coefficients.The circuit has been implemented with a Chartered0.35μm CMOS process.The output current is 1.5μA,and the circuit works properly with a supply voltage down to 2 V.Measurement results show that the temperature coefficient is 98 ppm/℃,and the line regulation is 0.45%/V.The occupied chip area is 0.065 mm~2.     

一种高精度CMOS带隙基准电压源设计

介绍了带隙基准电压源的基本原理,设计了一种高精度带隙基准电压源电路.该电路采用中芯国际半导体制造公司0.18 μm CMOS工艺.Hspice仿真表明,基准输出电压在温度为-10～120 ℃时,温度系数为6.3×10-6/℃,在电源电压为3.0～3.6 V内,电源抑制比为69 dB.该电压基准在相变存储器芯片电路中,用于运放偏置和读出/写驱动电路中所需的高精度电流源电路.