具有简单线性补偿和准谐振导通的原边控制的单级反激式LED驱动器

A single-stage flyback driving integrated circuit （IC） for light-emitting diodes （LEDs） is proposed. With an average primary-side current estimation and negative feedback networks, the driver operates in the boundary conduction mode （BCM）, while the output current can be derived and regulated precisely. By means of a simple external resistor divider, a compensation voltage is produced on the ISEN pin during the turn-on period of the primary MOSFET to improve the line regulation performance. On the other hand, since the delay time between the time that the secondary diode current reaches zero and the turn-on time of the MOSFET can be automatically adjusted, the MOSFET can always turn on at the valley voltage even if the inductance of the primary winding varies with the output power, resulting in quasi-resonant switching for different primary inductances. The driving IC is fabricated in a Dongbu HiTek＇s 0.35μm bipolar-CMOS-DMOS process. An 18 W LED driver is finally built and tested. Results show that the driver has an average efficiency larger than 86%, a power factor larger than 0.97, and works under the universal input voltage （85-265 V） with the LED current variation within ±0.5%.     

An isolated bridgeless AC-DC PFC converter using a LC resonant voltage doubler rectifier

This paper proposed an isolated bridgeless AC–DC power factor correction (PFC) converter using a LC resonant voltage doubler rectifier. The proposed converter is based on isolated conventional single-ended primary inductance converter (SEPIC) PFC converter. The conduction loss of rectification is reduced than a conventional one because the proposed converter is designed to eliminate a full-bridge rectifier at an input stage. Moreover, for zero-current switching (ZCS) operation and low voltage stresses of output diodes, the secondary of the proposed converter is designed as voltage doubler with a LC resonant tank. Additionally, an input–output electrical isolation is provided for safety standard. In conclusion, high power factor is achieved and efficiency is improved. The operational principles, steady-state analysis and design equations of the proposed converter are described in detail. Experimental results from a 60 W prototype at a constant switching frequency 100 kHz are presented to verify the performance of the proposed converter.     

带CLC滤波的反激变换器小信号建模与控制研究

为满足大型激光陀螺仪(ring laser gyroscope, RLG)中激光器激励源输出高精度、高稳定度的要求,针对单端反激变换器输出性能较差的问题,本文在传统反激变换器的输出端增加电感、电容元件,构成了输出带电容-电感-电容(capacitor inductor capacitor, CLC)滤波的单端反激变换器。在此基础上,采用开关元件平均模型法确定该变换器的静态工作点,建立电流连续模式(continuous conduction mode, CCM)下的四阶小信号模型;推导出相关传递函数,并引入相位超前校正环节以提高系统的稳定性;借助MATLAB软件构建比例-积分-微分(proportion-integral-differential, PID)控制的系统模型,完成了对带CLC滤波的反激变换器的分析与验证。结果表明,利用小信号建模理论建立的变换器模型是合理的,对激光器激励源的优化设计有参考意义。     

基于NCP1380的准谐振反激变换器四点平均效率改善研究

提出了一种基于NCP1380脉冲宽度（PWM）控制器的准谐振反激变换器设计方案,该方案的脉冲宽度控制器通过使用谷值检测与锁定技术、压控振荡技术达到改善准谐振反激变换器四点平均效率的目的.本文在分析了准谐振反激变换器轻载效率低原因的基础上,借助试验样机进行验证,测试数据表明改善后的准谐振反激变换器四点平均效率得到明显提升,证明了该技术的可行性与有效性.     

降低同步整流DC-DC变换器损耗技术的新拓扑

介绍了开关电源的同步整流原理，列出了采用同步整流技术直流一直流变换器的几种主要损耗，着重分析了两种降低主要损耗的新型优化拓扑电路以及其优缺点。     

单极变换技术在通信电源中的应用

介绍一种新的实现三相有源功率因数校正电路一单极变换电路，本介绍的单级变换电路具有功率因数校正与DC／DC变换两个电路的功能，该主电路的特点是结构简单，工作可靠。     

A novel digital multi-mode control strategy with PSM for primary-side flyback converter

This article described a novel digital multi-mode control strategy for primary-side controlled flyback converter to improve the efficiency within full-load range. The working modes of different load ranges were chosen according to the main power losses analysis and other constraint. Especially, a novel pulse skip mode control method which could reduce the number of actual switching cycles was proposed to improve the light load efficiency. A prototype with field-programmable gate array control has been made to verify the proposed digital multi-mode control strategy.     

An improved two-switch flyback converter with regenerative clamping

A novel soft-switching two-switch flyback converter is proposed in this article. This converter is composed of two active power switches, a flyback transformer and two passive regenerative clamping circuits. The proposed converter has the advantages of a low-cost circuit configuration, a simple control scheme, high efficiency, and a wide operating range. The circuit topology, analysis, design considerations and experimental results of the new flyback converter are presented.     

模块化多电平静止无功补偿器控制策略研究

随着多电平逆变器在电力系统无功功率补偿领域的广泛应用,提出了一种基于模块化多电平( MMC)技术的新型静止无功补偿器( STATCOM)的拓扑结构。该拓扑结构具有模块化程度高、可靠性好、便于维护及容量拓展等特点,是一种极具发展潜力的拓扑结构。首先对MMC-STATCOM的工作原理和数学模型进行了分析,提出了无功功率解耦控制策略以及提出了一种新的控制子模块电容电压平衡的控制算法。仿真和测试结果均表明MMC-STATCOM具有补偿效果好,动态响应速度快等优点,是一种具有工程应用价值的大容量STATCOM主电路拓扑。     

一种新型单级功率因数校正AC/DC变换器的研究

文章研究了一种新型单级单开关PFC反激变换器。该变换器负载变轻时其储能电容电压不会飘升,应用于宽范围交流输入电压,储能电容电压低于450V。变换器用其变压器中的一个附加绕组实现了升压功能。由于省去了大电感,减小了变换器的体积和重量,在中小功率应用场合下,变换器符合IEC61000-3-2class D谐波标准,并且具有输出电压快速调节能力。     

一种隔离型双向功率流动逆变器的研究

单级式逆变器相比于两级式逆变器具有结构简单,易模块化,功率密度高的特点。针对于单级式双向逆变器的研究,提出了一种新颖的功率双向流动的逆变器拓扑,该拓扑将滤波电感替换成反激变压器,在功率反向流动时,能量通过反激变换器传送至DC端,从而实现功率的双向流动;对该逆变电路的工作原理、控制策略、电路参数理论分析,在理论的基础上研制出一台800 VA 80 DC/200 V 50 Hz AC样机。     

Implementation of zero current switch turn-ON based buck-boost-buck type rectifier for low power applications

A single-stage single-switch AC–DC integrated converter is proposed in this paper, as a tight DC voltage regulator with unity input power factor for the fundamental component of the input current. Proposed converter is formed by the integration of buck-boost configuration with a buck converter operated by a single switch. The buck-boost section of the proposed configuration is operated in current discontinuous conduction mode (DCM) to get unity input power factor at the supply terminals and the buck section is operated up to boundary current conduction mode (BCM). The features acquired by the converter operating in complete discontinuous conduction mode (DCM) are unity input power factor, zero-current turn-ON for the Switch, fast and good DC output voltage regulation with extensive conversion range and low voltage stress on the switch. Additionally, the intermediate capacitor voltage stress is independent of converter load variations and so the switch also is subjected to constant peak voltage stress. A comprehensive study is carried out to obtain the necessary design equations. A design model is implemented using simulation and hardware. The results confirm the performance of the proposed configuration.     

单级反激式PFC连续模式下电流有效值计算

单级反激式连续工作模式下功率因数校正电路的输入电压在半个工频周期内呈正弦变化。变压器绕组中的电流是一系列梯形脉冲,并且脉冲宽度以及电流的变化率都随着输入电压的瞬时值变化。依据有效值定义推导出了变压器原副边电流有效值的解析解;在相同的假设条件下,利用积分得出了电流有效值数值计算公式。解析解和数值解分析对比结果表明,两种计算结果具有很好的一致性。通过实验验证,用这种方法设计的变压器在同样温升的前提下,变压器体积大大减小。     

Experimental design of a fuzzy controller for improving power factor of boost rectifier

This article presents the design and the implementation of dSPACE DS1104 controller board-based PI and fuzzy logic peak current-mode controllers in the voltage loop and two controllers in the current loop based first on a standard fixed hysteresis band control, followed by a variable hysteresis band control to achieve constant switching frequency for a single-phase active power factor corrector in the continuous conduction mode. All these controllers have been verified via simulation in Simulink and a real-time implementation is performed on an experimental test bench utilising a rapid prototyping tool. The controllers are experimentally compared for steady-state performance and transient response. It is shown that the PI and fuzzy logic controllers give a superior steady-state performance, whereas the fuzzy logic inference based controller can achieve better dynamic response than its PI counterpart under large load disturbance and plant uncertainties. Furthermore, the variable hysteresis band control in the current loop gives a low total harmonic distortion of the input current compared to a standard fixed hysteresis band control.     

基于电荷控制的反激单级功率因数校正变换器的仿真

描述了基于电荷控制的反激单级功率因数校正变换器的特性及其小信号模型。借助Mathcad和Saber软件，分析了系统的频域及时域特性。实验结果表明此变换器具有较好的应用前景。     

Reverse matrix converter control method for PMSM drives using DPC

This paper proposes a control method for a reverse matrix converter (RMC) that drives a three-phase permanent magnet synchronous motor (PMSM). In this proposed method, direct power control (DPC) is used to control the voltage source rectifier of the RMC. The RMC is an indirect matrix converter operating in the boost mode, in which the power-flow directions of the input and output are switched. It has a minimum voltage transfer ratio of 1/0.866 in a linear-modulation region. In this paper, a control method that uses DPC as an additional control method is proposed in order to control the RMC driving a PMSM in the output stage. Simulations and experimental results verify the effectiveness of the proposed control method.     

单相有源功率因数校正电路拓扑技术研究进展

各种严格的谐波标准的出台,推动了功率因数校正电路技术的发展。文章分析了单相功率因数校正电路技术的概况,从实现的方式及其特点等方面较系统地论述了单相有源功率因数校正电路拓扑技术近期的发展,并指出了今后单相功率因数校正电路技术的发展趋势。     

High-efficiency isolated SEPIC converter with reduced conduction losses for LED displays

This paper proposes a high-efficiency isolated bridgeless single-ended primary inductor converter (SEPIC) for light-emitting-diode (LED) displays. The proposed isolated SEPIC converter can supply LED back-light power with reduced conduction losses. Switching power losses as well as conduction losses are reduced. The proposed converter is theoretically analysed. Experimental results based on a 28 V, 300 W back-light power are discussed to verify the performance of the proposed converter.     

一种新型的基于航空电网的高功率因数校正器

研究了一种基于航空电网的高功率因数Boost PFC变换器,与以往采用的乘法器控制方法不同的是,该变换器采用新型单周期控制方法。文中分析了该变换器的工作原理,给出了系统电压环的结构模型和设计过程。仿真和实验结果证明了在输入电源频率较高场合,单周期控制Boost PFC变换器具有良好的性能。     

A high-resolution time-to-digital converter using a three-level resolution

In this article, a three-level resolution Vernier delay line time-to-digital converter (TDC) was proposed. The proposed TDC core was based on the pseudo-differential digital architecture that made it insensitive to nMOS and pMOS transistor mismatches. It also employed a Vernier delay line (VDL) in conjunction with an asynchronous read-out circuitry. The time interval resolution was equal to the difference of delay between buffers of upper and lower chains. Then, via the extra chain included in the lower delay line, resolution was controlled and power consumption was reduced. This method led to high resolution and low power consumption. The measurement results of TDC showed a resolution of 4.5 ps, 12-bit output dynamic range, and integral nonlinearity of 1.5 least significant bits. This TDC achieved the consumption of 68.43 µW from 1.1-V supply.