共查询到19条相似文献,搜索用时 0 毫秒
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介绍了多载波通信中一种设计高效宽带锐截止FIR(有限冲击响应)滤波器的新方法———频障法。通过选择特定的原型滤波器来降低实现宽带锐截止FIR滤波器的复杂度。首先设计一个合适的宽带低通原型FIR滤波器Ha(z),然后得到其互补滤波器Hc(z)。再对它们进行L倍内插,得到两个互补的多带滤波器Ha(zL)、Hc(zL),然后用合适的频障滤波器HMa(z)和HM c(z)分别去消除Ha(zL)、Hc(zL)中不需要的频带,相应的输出加在一起就是所要设计的滤波器H(z)。详细研究了该方法的实现结构和设计方法,并通过设计实例证明了实现同样的性能时频障法比其他方法能节省很大的运算量,因而具有较高的应用价值。 相似文献
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外插脉冲响应(EIR)滤波器设计技术是一种低复杂度有限冲击响应(FIR)滤波器设计技术,而基于主成份分析(PCA)的EIR(PCA-EIR)滤波器设计技术是一种有效(算法执行简单,效果较好)的EIR滤波器设计技术.PCA-EIR技术通过对由原型FIR滤波器系数组成的系数矩阵采用PCA技术进行降维来近似合成原型FIR滤波器,以达到降低原型滤波器硬件执行复杂度的目的.本文提出了一种简单有效的改进型PCA-EIR技术,其基本思想是将系数矩阵的前若干列向量保持不变,对剩余部分列向量组成的矩阵采用PCA技术进行降维来合成原型FIR滤波器.所提出改进型PCA-EIR技术的算法执行复杂度与传统PCA-EIR技术相当,且在滤波器频率响应指标基本相等的前提下,改进型PCA-EIR技术节省3.5%-17.5%乘法器和25.6%-51.6%加法器,从而进一步降低了FIR滤波器的硬件执行复杂度. 相似文献
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本文将EDA技术引入"数字信号处理"课程实验教学,采用FPGA实现了一款基于分布式算法的4阶FIR滤波器;利用FPGA的ROM宏模块构建查找表,实现了分布式算法;利用QUARTUSⅡ软件完成分布式滤波器电路设计以及波形仿真。与传统的调用QUARTUS II软件中的参数化FIR宏模块实现方式相比,采用分布式算法实现FIR滤波器,不仅能大大节省FPGA资源开销,提高运算速度,而且有利于提升学生应用FPGA进行硬件设计与开发的能力。 相似文献
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基于DSP的FIR滤波器的C语言算法实现 总被引:1,自引:0,他引:1
有限冲激响应(FIR)滤波器是数字信号处理系统中最基本的元件,具有严格的线性相频特性,同时其单位抽样响应是有限长的,系统稳定。阐述了FIR的基本原理,并进行了MATLAB仿真。基于TI公司的TMS320VC5402 DSP硬件平台,设计了FIR低通滤波器。采用C语言算法,利用集成开发环境代码调式器(Code Composer Studio,CCS)分别观察了输入和输出波形,验证了此算法的准确性和高效性,对信号处理及信号传输有重要的研究意义。 相似文献
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向量处理器的向量化算法映射是难点问题.提出一种支持任意系数长度和数据类型的FIR滤波器向量化方法,将(Finite Impulse Response)滤波器的卷积计算划分为系数长度步向量乘法和加法计算,每一步的向量乘法和加法计算在各个向量处理单元上并行执行,计算一个输出结果的所有乘法和加法计算都在同一向量处理单元上完成,每次循环能够同时完成向量处理单元数量个输出结果的计算.在向量处理器YHFT-Matrix的实验结果表明,该向量化FIR滤波器能够取得高效的计算性能和加速比. 相似文献
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Improving a Hybrid Method of Indoor Propagation Modeling for Wireless Communications Systems 总被引:2,自引:0,他引:2
1 IntroductionThewirelesscommunicationsystemshavebeendevelopedrapidlyintherecentyears.Ithasnotonlycalledresearchers’attentiontomodelingtechniquesinInternet[1 ] ,butalsomoreandmorepeopleen gagedin propagationmodelingforindoorwirelesscommunications.Theeffectivedesign ,assessmentandinstallationofaradionetworkinanindoorenvi ronmentrequireanaccuratecharacterizationoftheradiopropagationchannel.Raytracingisapopularmethodforthepredictionofradiochannelcharacter isticsofwirelesscommunicationsystems.R… 相似文献
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基于分段查找表的高速FIR滤波器的设计实现 总被引:2,自引:0,他引:2
提出了一种基于分段查找表的高速FIR滤波器的实现结构,该结构可应用于任意阶数的高速FIR滤波器设计中。采用分段查找表代替传统的乘法器、在加法输出级中插入流水线,以提高滤波器的工作速度;同时,通过数据预处理和查找表复用技术,降低了硬件开销。该设计方法已应用于射频识别超高频阅读器接收端的低通滤波器设计中,性能经Altera Stratix II FPGA测试后,可得到最高工作频率为170.44 MHz,比传统结构的提高了96.44 MHz,且硬件资源消耗较少,约为传统结构的三分之一。 相似文献
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In the present century, digital signal processing (DSP) approaches are considered to be one of the most powerful technologies which may shape the science and technology in coming decades. From 1970 onwards, a drastic revolution took place in a wider domain of DSP which has made it popular in several studies such as radar and sonar signal processing, digital televisions, wireless communication scenarios and other multimedia setup etc. Digital filters form the backbone of this DSP architecture and in point of fact the field of digital filter design has drawn justified recognition from the researchers throughout the world for the last 50 years. In connection to this, thousands of research articles may be found from the literature which had extensively addressed on the design of such filters. In order to meet the requirement of narrow transition-band, finite impulse response (FIR) filters are commonly assumed to be of higher order and accordingly it significantly enhances computational complexity. In regard to this, construction of hardware efficient digital filters had drawn significant consideration which aims to include minimum hardware elements during its application and consequently consumes less power. This review paper illustrates various techniques for the implementation of hardware efficient narrow transition-band FIR filter and investigates a number of favourable attributes which are capable in sustaining the stringent requirements of communication standards. A good number of relevant articles are taken from the literature so as to make a robust and complete review. 相似文献
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Rong Wang Ray Siferd Robert L. Ewing 《Analog Integrated Circuits and Signal Processing》2001,28(2):149-160
This paper presents the design and simulation of a 9-Tap CMOS Analog Discrete-Time Finite Impulse Response (FIR) Filter system. This unique design features a Circular Buffer Architecture which achieves high sampling rate that can be easily expanded to improve speed and extended to higher order filters. Novel area-efficient four quadrant CMOS analog adder and multiplier circuits are employed to respond for high frequency and wide linear range inputs. The layout for all circuits has been realized using the design tool MAGIC with a 1.2 m CMOS process. The performance for each circuit and the whole system are characterized using HSPICE simulation based on the extracted MAGIC netlist. The 9-tap filter was designed to achieve 5 MHz sampling rate. The implemented design requires a total chip area of 1690.9 m by 2134.2 m and ±5 volt power supply. 相似文献
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提出了一种适用于ACO-OFDM无线光通信系统的基于时域叠加训练序列的时间同步方法.该方法将经过ACO-OFDM调制后的伪随机序列作为训练序列,并将其在一个符号周期内与数据同时发送.接收端利用本地序列与接收信号进行相关运算,对所叠加训练序列的能量进行积累,从而实现时间同步.仿真表明,在多种信道模型下,该方法能够有效改善同步准确率和定时偏移方差,同时极大地提高了带宽效率,使得时间功率分配具有较强的灵活性. 相似文献
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Yuriy S. Shmaliy 《Signal, Image and Video Processing》2009,3(2):127-135
The paper addresses a new unbiased p-step toward predictive finite impulse response (FIR) filter for a class of discrete-time deterministic state space models,
which states are represented on a horizon of N past points with degree polynomials and observed independently. It is implied that measurements are not available at a current
time point n. The problem arises in synchronization and tracking when a signal is lost. Generic coefficients are derived via the Bernoulli
polynomials for a two-parameter family of the polynomial filter gains. A generalization is provided for the linear (ramp)
and quadratic filter gains. We show that the solution proposed is efficient in applications to predictive filtering of the
states of local clocks of digital communication network nodes when a synchronizing signal is temporarily not available. 相似文献
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论述了基于DSP技术的RFID读写器设计方法。在描述RFID系统组成的基础上,给出了读写器的软硬件设计流程。重点阐述了DSP对接收信号的软件处理以及反冲撞功能的实现方法。该读写器已应用于开放式门禁系统中,实际应用结果表明其性能良好。 相似文献
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在非线性调频信号的波形设计和谱修正滤波的理论基础上,提出了采用组合窗函数设计出非线性调频信号的波形和谱修正滤波器,该方法可以通过改变组合窗系数来调整不同窗函数对信号脉冲压缩性能的影响。仿真结果表明,在一定条件下采用组合窗函数后,主副瓣比可提高1.8~8.3dB,而主瓣展宽和主瓣损失较小。 相似文献
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PANG Xingdong HONG Wei YANG Tianyang LI Linsheng 《中国通信》2014,(11):16-23
This paper focuses on the design and implementation of an active multibeam antenna system for massive MIMO applications in 5G wireless communications. The highly integrated active multibeam antenna system is designed and implemented at 5.8 GHz with 64 RF Channels and 256 antenna elements. The 64-channel highly integrated active multibeam antenna system provides a verification platform for digital beamforming algorithm and massive MIMO channel estimation for next generation wireless communications. 相似文献