A digital predistortion assisted hybrid supply modulator for envelope tracking power amplifiers

In this paper, a novel digital predistortion assisted supply modulator is presented. The proposed modulator is suitable for envelope tracking power amplifiers. In this topology, a digitally controlled linear power amplifier is used to compensate the switching noise ripples of the switching modulator. The proposed structure is evaluated with a 0.18 µm CMOS process technology. The results show up to 9% static efficiency improvement in comparison with previous one-phase and two-phase architectures. It is shown that for a 5 MHz WiMAX signal with a 6.7 dB PAPR at 26.8 dBm output power, a maximum average efficiency of 73.5% is achieved in the proposed design.     

基于坐标变换的射频功放预失真参数估计方法

在低中频预失真器构架的基础上,提出了一种基于坐标变换的预失真参数估计方法,从而降低了传统数字基带预失真系统的硬件成本和数值计算量。算法将传统算法中的复数乘法转换为极坐标中的幅度乘法和相位加法,使同样的计算步骤所消耗的乘法和加法次数分别降低了75%和50%。算法由通用的通带Volterra非线性模型进行推导得出,适用于当前的任意系统模型。对实际射频功放的测试实验结果验证了其有效性。     

一种高效的用于RF功率放大器线性化的自适应预失真结构

分析了当前文献中主要的几种自适应预失真结构,发现这些自适应预失真结构均不利于高效最小二乘算法的直接应用,从而限制了预失真技术的自适应性能.提出了一种新的自适应预失真结构,可直接使用高效的最小二乘算法对预失真器进行自适应更新.仿真结果表明利用此结构可快速、高效地实现非线性RF功率放大器的线性化.     

功率放大器数字预失真技术的研究

在宽带码分多址(WCDMA)等宽带通信系统中,射频功率放大器呈现出严重的电记忆效应和热记忆效应,产生频谱再生和邻道干扰,传统的无记忆预失真技术已经无法消除信号失真而达到理想的线性化效果.针对此类有记忆性的功放,文章提出一种新的记忆多项式预失真器,以跟踪射频功率放大器特性的变化, 并进行非线性补偿.     

Neural-network-based adaptive baseband predistortion method for RF power amplifiers

An adaptive baseband predistortion method for RF power amplifier (PA) linearization is proposed and experimentally demonstrated. The predistortion component is implemented by a single-input dual-output multilayer perceptron (MLP). Both amplitude-to-amplitude and amplitude-to-phase distortion products are compensated by backpropagation training of the neural network including the response of the PA. Effects of modulator and demodulator imperfections on system performance are examined. Measurements on a system prototype reveal a significant linearity improvement that reaches 25 dB.     

Chip for wideband digital predistortion RF power amplifierlinearisation

The authors present a custom chip for use in digital predistortion linearisation of RF power amplifiers. The chip is mainly implemented with systolic arrays. At maximum clock-rate, 130 MHz, the throughput is 16 Msamples/s with a 5 V supply voltage and power consumption of 1 W. A throughput of 2 Msamples/s is achieved at a 1.2 V supply voltage with 6 mW power consumption     

Genetic algorithm optimization of a hybrid analog/digital predistorter for RF power amplifiers

This study presents a genetic algorithm optimization of a hybrid analog/digital predistorter, in order to reduce the intermodulation distortion (IMD) caused by the nonlinear properties of the radio frequency (RF) power amplifier (PA). Designed predistorter based on polynomial work function and the coefficient of the polynomial is optimized in order to reduce IMD by spectrum monitoring. The design procedure and validation of predistorter have been carried out by Agilent-ADS2005A. In order to validate the predistorter two different modulation schemes as CDMA and 16-QAM have been used. Also in order to verifying the linearization a test power amplifier circuit has been examined including Motorola MOSFET MRF9742 showing the nonlinear characteristics with memory. Simulations have been shown that adjacent channel power ratio (ACPR) improvements were acceptable for both CDMA and 16-QAM modulation schemes.     

Optimization of EDGE terminal power amplifiers using memoryless digital predistortion

This paper describes a lookup-table (LUT)-based digital predistortion system usable for enhanced data for global system for mobile evolution (EDGE) handset transmitters. The system is memoryless and capable of improving average efficiency and performance in terms of the leakage power at offset frequencies and error vector magnitude. The obtainable efficiency at maximum linear output power is comparable, but at backoffs superior to commercial EDGE power amplifiers (PAs). Minimum system requirements on word length and LUT size have been investigated, which shows that a LUT having approximately 500 coefficients and a system word length of 13 bits are sufficient for EDGE. The proposed system is simple compared to basestation implementations comprising PA memory compensation and can be easily implemented in handsets in order to improve the overall system performance. The effects of antenna mismatch on system performance have been investigated     

Ka频段10 W自适应射频预失真线性化固态功放研制

射频功率放大器的特性会随信道切换、环境温度、工作状态等多种因素发生变化,为了保证功率放大器的优良工作特性,具有自适应性能的预失真系统就显得非常重要。提出了一种自适应反馈检测方法,以减小放大器输出信号的幅度失真和相位失真作为系统自适应的优化目标,采用多方向搜索优化算法对预失真系统进行优化调整,使系统始终处于最优工作状态。研制了工作于Ka频段10 W自适应射频预失真线性化固态功放原理样机,当工作温度为-40℃~+60℃时,在3 GHz的工作带宽内,三阶交调指标优于-32 dBc。测试结果表明该功放具有工作频带宽、温度适应性广等特点。     

Adaptive neuro-fuzzy inference system (ANFIS) digital predistorter for RF power amplifier linearization

This paper describes an adaptive digital predistorter (ADP) for RF power amplifier (PA) linearization using an adaptive neuro-fuzzy inference system (ANFIS). The ANFIS predistorter (PD) employs the advantage of real-time modeling of the PA's responses in determining the PD's functions. The amplitude and phase corrections for the PD are represented in an easy-to-understand fuzzy if-then rule, while the parameters involved in the fuzzy representation are trained using neural networks algorithms, namely gradient-descent and least squares estimate (LSE). Experimental results show that a 26.3-dB improvement in linearity for a two-tone signal is obtained, while a distorted WCDMA signal is suppressed by at least 12 dB. The adaptability of the ANFIS PD to instantaneous variation in PA responses through time is also demonstrated, and results show that the ANFIS PD is capable of adapting to simulated environmental changes, which is a topic often omitted by researchers in this area. Further testing demonstrated that the tuning parameters involved in the training could be reduced by more than half for a fairly nonlinear PA without significantly degrading the suppression capability.     

Baseband derived RF digital predistortion

A unique baseband derived RF predistortion system which uses lookup table coefficients extracted at baseband that directly RF envelope modulate a quadrature vector modulator is presented. The primary advantages of this architecture are that it combines the narrowband advantage of envelope predistortion with the accuracy of baseband predistortion.     

Wiener功率放大器的一种简化预失真方法

根据Hammerstein模型的一种最优两步辨识算法的思路,针对预失真技术的特点对Hammerstein模型进行了两次转换,建立了一种等效的但形式简单的记忆非线性预失真器模型——非线性抽头延时多项式模型,从而简化了Wiener功放的预失真。仿真结果表明,利用所提出的记忆预失真器模型能使用较少的参数,快速、简便地实现记忆放大器的预失真,而且具有满意的线性化性能。     

An accurate digital baseband predistorter design for linearization of RF power amplifiers by a genetic algorithm based Hammerstein structure

In this paper, a novel digital predistorter design based on the Hammerstein structure is proposed in order to linearize radio frequency power amplifiers. A genetic algorithm optimization method has been proposed to accurately identify the coefficients of a Wiener model for the power amplifier. Digital predistorter design based on the proposed Hammerstein model has been carried out according to the accurate Wiener model. The validation of the suggested model is carried out using the simulation of the power amplifier and the digital predistortion excited by 64QAM signals in the advanced design system software. According to the simulation results, the criterion of an adjacent channel power ratio decreased by about 16 dB. The simulation results show the adjacent channel power ratio of almost ??46 dBc. In order to assess the feasibility of the proposed predistorter, it is completely implemented in the Kintex FPGA using Vivado HLS. This proposed model enables a more accurate modeling of nonlinear distortion and memory effects compared to the previous linearization methods. This paper presents the new linearization method using the genetic algorithm based Hammerstein structure.     

Thermal memory effects modeling and compensation in RF power amplifiers and predistortion linearizers

Memory effects, which influence the performance of RF power amplifiers (PAs) and predistortion-based linearizers, become more significant and critical in designing these circuits as the modulation signal bandwidth and operation power increase. This paper reports on an attempt to investigate, model, and quantify the contributions of the electrical nonlinearity effects and the thermal memory effects to a PA's distortion generation, as well as how to compensate for these effects in designing baseband predistortion schemes. The first part of this paper reports on the development of an accurate dynamic expression of the instantaneous junction temperature as a function of the instantaneous dissipated power. This expression has been used in the construction of an electrothermal model for the PA. Parameters for the new proposed behavior model were determined from the PA measurements obtained under different excitation conditions (e.g., small-signal and pulsed RF tests). This study led us to conclude that the effects of the transistor self-heating phenomenon are more important under narrow-band signal (e.g., enhanced data for global evolution of global system for mobile communications) than for signals with wide modulation bandwidth (CDMA2000, Universal Mobile Telecommunications System). In the second part of this paper, the newly developed model has also been used to design a temperature-compensated predistortion function to compensate for these effects. The linearized PA output spectrum and error vector magnitude show a significant performance improvement in the temperature-compensated predistortion function over a memoryless predistortion. The results of these measurements that have been conducted on a 90-W peak lateral double-diffused metal-oxide-semiconductor PA are in agreement with those obtained from simulations using the developed PA and the predistorter models implemented in an ADS environment.     

An analog/digital pre-distorter using particle swarm optimization for RF power amplifiers

In this paper, a novel pre-distorter is presented using the particle swarm optimization (PSO) for an RF power amplifier linearization has been presented. We used the PSO in order to design of an efficient pre-distorter for the linearization of the output of an RF power amplifier by using the output data of the proposed power amplifier. The PSO is implemented to estimate and optimize the coefficient parameters of the work function in the proposed pre-distorter block diagram. The proposed method using PSO is most efficient because this approach is independent of the output of the power amplifier. The proposed method has been simulated with two-tone input signal and output power spectrum has been compared, where the obtained adjacent channel leakage ration (ACLR) is better than 50 dBc for both channels. Therefore, a quite significant improvement in linearity is achieved.     

Effects of reconstruction filters in digital predistortionlinearizers for RF power amplifiers

The reconstruction filters are a major source of error in digital predistortion linearizers for RF power amplifiers. This paper presents a method that enables these filters to be designed for lowest filter complexity and minimum degradation of the linearizer performance. Furthermore, a method to choose an appropriate sampling rate for the predistorter is presented. Different filter approximations and orders are examined for different amplifier configurations by means of simulation. Of the filters tried, low-ripple Chebyshev and Butterworth filters perform best. It is demonstrated that it is possible to account for reasonable filter misalignment with only a small degradation in performance. It is also shown that the effect on the modulation is small with respect to intersymbol interference     

Dynamically optimum lookup-table spacing for power amplifier predistortion linearization

The lookup-table-based digital adaptive predistortion (DAPD-LUT) approaches are low cost and effective for power amplifier (PA) linearization in wireless applications. However, most existing DAPD-LUT schemes are sub-optimum because they adopt uniformly spaced LUTs regardless of the system state information (SSI), i.e., the PA characteristics and the input signal statistics. Other existing DAPD-LUT schemes assume either full or partial knowledge of the SSI to optimize and then to freeze the LUT spacing. Without prior knowledge of the SSI, we propose an SSI-learning low-complexity procedure to optimize the LUT spacing for a DAPD-LUT scheme. The proposed procedure is capable of online adapting the LUT spacing for PAs with various nonlinear characteristics, for input signals with various statistics, and for wireless environments with various time-varying properties.     

无线通信中有记忆功率放大器的一种预失真方法

在WCDMA等宽带通信系统中,射频功率放大器记忆效应明显,传统的无记忆预失真技术无法达到理想的线性化效果.分析功放的记忆效应,并提出一种适合于有记忆射频功率放大器的顸失真方法.该方法首先基于记忆多项式构造预失真器,然后采用间接学习结构设计预失真系统,并运用限定记忆递推最小二乘算法更新预失真器参数,以跟踪放大器特性的变化.仿真结果表明,该方法能较好地补偿射频功放的非线性失真和记忆效应.     

Peak‐to‐average power ratio reduction and digital predistortion effects in power amplifiers in OFDM system

In this paper, the effects of peak‐to‐average power ratio reduction in nonlinear power amplifiers (PAs) by considering memory effects and of digital predistortion are investigated. A new predistortion technique is proposed, which is called the complex gain memory predistortion (CGMP) method. The CGMP is applied to compensate the dynamic memory effects of PAs. The conventional partial transmit sequence method is applied for peak‐to‐average power ratio reduction, and combining it with the CGMP results in efficiency enhancement and spectrum efficiency improvement. Simulation and results are examined with the two types of PAs and with an OFDM signal with quadrature phase‐shift keying modulation. Copyright © 2011 John Wiley & Sons, Ltd.     

Quantization analysis and design of a digital predistortionlinearizer for RF power amplifiers

Significant improvements in terms of reduced power consumption and increased bandwidth are obtained if a digital predistortion linearizer is implemented with an application specific digital signal processor. This paper investigates the quantization effects in different parts of a table based complex gain predistortion linearizer. The analysis can be used to optimize the predistortion linearizer with respect to word length based on the knowledge of the RF amplifier gain characteristic, the probability density function for the modulation scheme and the maximum allowable adjacent channel interference level. A predistorter chip is described that has been designed using the analysis. The chip has been fabricated and tested. Compared with a standard digital signal processing (DSP) solution it provides seven times higher bandwidth but consumes only 10% of the power