纳米MOSFET迁移率解析模型

从玻尔兹曼方程出发，重新计算了纳米MOSFET沟道内的载流子所服从的分布函数，特别是考虑了纳米MOSFET横向电场和纵向电场之间的相互作用，并且以得到的非平衡状态下的分布函数为基础，考虑载流子寿命和速度的统计分布，给出了纳米MOSFET载流子迁移率的解析表达式.通过与数值模拟结果进行比较和分析，该迁移率解析模型形式简洁、物理概念清晰，且具有相当精度. 关键词： 玻尔兹曼方程 纳米MOSFET 迁移率 沟道有效电场     

不同散射机理对 Al2O3/InxGa1-xAs nMOSFET 反型沟道电子迁移率的影响

通过考虑体散射、界面电荷的库仑散射以及 Al₂O₃/In_xGa_1-xAs 界面粗糙散射等主要散射机理, 建立了以 Al₂O₃为栅介质In_xGa_1-xAs n 沟金属-氧化物-半导体场效应晶体管 (nMOSFETs) 反型沟道电子迁移率模型, 模拟结果与实验数据有好的符合. 利用该模型分析表明, 在低至中等有效电场下, 电子迁移率主要受界面电荷库仑散射的影响; 而在强场下, 电子迁移率则取决于界面粗糙度散射. 降低界面态密度, 减小 Al₂O₃/In_xGa_1-xAs 界面粗糙度, 适当提高In含量并控制沟道掺杂在合适值是提高 InGaAs nMOSFETs 反型沟道电子迁移率的主要途径. 关键词： InGaAs MOSFET 反型沟道电子迁移率 散射机理     

非均匀沟道MOS辐照正空间电荷迁移率模型

提出非均匀沟道MOS辐照正空间电荷迁移率模型.借助镜像法导出沟道电离杂质与辐照正空间电荷的二维场和二维互作用势的分布，由此给出非均匀n沟和p沟的迁移率表示式，其解析解与二维仿真值十分吻合.还借助二维仿真器计算均匀沟道MOS辐照正空间电荷迁移率的变化值，其值和文献［2，3］实验数据一致. 关键词： 非均匀沟道MOS 镜像法 二维互作用势     

N/P沟道MOSFET1/f噪声的统一模型

对n／p两种沟道类型、不同沟道尺寸MOSFET的1／f噪声特性进行了实验和理论研究.实验结 果表明，虽然nMOSFET的1／f噪声幅值比pMOSFET大一个数量级，但是其噪声幅值均表现出和 有效栅压的平方成反比、和漏压的平方成正比、和沟道面积成反比的规律.基于该实验结果 ，认为MOSFET的1/f噪声产生机理为位于半导体_氧化物界面附近几个纳米范围内的氧化层陷 阱通过俘获和发射过程与沟道交换载流子，在引起载流子数涨落的同时也通过库仑散射导致 沟道载流子迁移率的涨落.在这两种涨落机理的基础上，引入了氧化层陷阱的分布特征及其 与沟道交换载流子的隧穿和热激活两种方式，建立了MOSFET l／f噪声的统一模型.实验结果 和本文模型符合良好. 关键词： 1/f噪声 MOSFET 氧化层陷阱 涨落     

SiC肖特基源漏MOSFET的阈值电压

SiC肖特基源漏MOSFET的阈值电压不同于传统的MOSFET的阈值电压.在深入分析工作机理的基础上,利用二维模拟软件ISE提取并分析了器件的阈值电压.对SiC肖特基源漏MOSFET的阈值电压给出物理描述,得出当源极载流子主要以场发射方式进入沟道,同时沟道进入强反型状态,此时的栅电压是该器件的阈值电压. 关键词： 碳化硅 肖特基接触 阈值电压     

界面态电荷对n沟6H-SiC MOSFET场效应迁移率的影响

针对界面态密度在禁带中的不均匀分布，分析了界面态电荷对n沟6H碳化硅MOSFET场效应迁移率的影响.分析结果显示，界面态电荷使n沟碳化硅器件的场效应迁移率明显降低.并给出了实验测定的场效应迁移率和反型层载流子迁移率的比值与界面态密度之间关系. 关键词： 碳化硅 界面态 反型层迁移率 场效应迁移率     

超短沟道绝缘层上硅平面场效应晶体管中热载流子注入应力导致的退化对沟道长度的依赖性

随着场效应晶体管(MOSFET)器件尺寸的进一步缩小和器件新结构的引入, 学术界和工业界对器件中热载流子注入(hot carrier injections, HCI)所引起的可靠性问题日益关注. 本文研究了超短沟道长度(L=30–150 nm)绝缘层上硅(silicon on insulator, SOI)场效应晶体管在HCI应力下的电学性能退化机理. 研究结果表明, 在超短沟道情况下, HCI 应力导致的退化随着沟道长度变小而减轻. 通过研究不同栅长器件的恢复特性可以看出, 该现象是由于随着沟道长度的减小, HCI应力下偏压温度不稳定性效应所占比例变大而导致的. 此外, 本文关于SOI器件中HCI应力导致的退化和器件栅长关系的结果与最近报道的鳍式场效晶体管(FinFET)中的结果相反. 因此, 在超短沟道情况下, SOI平面MOSFET器件有可能具有比FinFET器件更好的HCI可靠性.     

多晶SiGe栅量子阱pMOSFET阈值电压模型

本文基于多晶SiGe栅量子阱SiGe pMOSFET器件物理,考虑沟道反型时自由载流子对器件纵向电势的影响,通过求解泊松方程,建立了p+多晶SiGe栅量子阱沟道pMOS阈值电压和表面寄生沟道开启电压模型.应用MATLAB对该器件模型进行了数值分析,讨论了多晶Si_1-yGe_y栅Ge组分、Si_1-xGe_x量子阱沟道Ge组分、栅氧化层厚度、Si帽层厚度、沟道区掺杂浓度和 关键词： 多晶SiGe栅 寄生沟道 量子阱沟道 阈值电压     

高迁移率Ge沟道器件研究进展

高迁移率Ge沟道器件由于其较高而且更对称的载流子迁移率, 成为未来互补型金属-氧化物-半导体(CMOS) 器件极有潜力的候选材料. 然而, 对于Ge基MOS器件, 其栅、源漏方面面临的挑战严重影响了Ge基MOS 器件性能的提升, 尤其是Ge NMOS器件. 本文重点分析了Ge基器件在栅、源漏方面面临的问题, 综述了国内外研究者们提出的不同解决方案, 在此基础上提出了新的技术方案. 研究结果为Ge基MOS 器件性能的进一步提升奠定了基础.     

沟道宽度对ZnO-TFT电学性能的影响

用射频磁控溅射法生长的ZnO薄膜作为有源层,制备出了ZnO基薄膜晶体管(ZnO-TFT),并在空气环境下350℃退火1 h,研究了沟道宽度对ZnO-TFT器件性能的影响。实验结果表明:阈值电压随着沟道宽度的减小而增加,这是由于沟道越窄,载流子被捕获的几率越大,在相同栅压下沟道内可动载流子浓度越小,相应的阈值电压就越大;饱和迁移率随着沟道宽度的减小而增加,认为这是由源/漏电阻的侧壁效应及边缘电子场效应引起的附加电流所致。     

Study of density of interface states in MOS structure with ultrathin NAOS oxide

The quality of the interface region in a semiconductor device and the density of interface states (DOS) play important roles and become critical for the quality of the whole device containing ultrathin oxide films. In the present study the metal-oxide-semiconductor (MOS) structures with ultrathin SiO₂ layer were prepared on Si(100) substrates by using a low temperature nitric acid oxidation of silicon (NAOS) method. Carrier confinement in the structure produces the space quantization effect important for localization of carriers in the structure and determination of the capacitance. We determined the DOS by using the theoretical capacitance of the MOS structure computed by the quantum mechanical approach. The development of the density of SiO₂/Si interface states was analyzed by theoretical modeling of the C-V curves, based on the superposition of theoretical capacitance without interface states and additional capacitance corresponding to the charges trapped by the interface states. The development of the DOS distribution with the passivation procedures can be determined by this method.     

分子束外延生长Si/GaP(111)异质结的界面特性

本文研究了分子束外延(MBE)生长的n-N型Si/GaP(111)异质结的界面特性。采用C-V法测量Si/GaP(111)异质结的表观载流子浓度分布n(x),从中导出了异质界面的导带失配值和界面电荷密度。实验结果表明,n-N型Si/GaP(111)是一种弱整流结构。导带失配△E_c=0.10eV,界面电荷密度σ_i=8.8×10¹⁰cm^-2。通过表现载流子浓度n(x)的理论计算曲线与实验曲线符合较好,说明了实验结果的可靠性 关键词：     

p型硅MOS结构Si/SiO2界面及其附近的深能级与界面态

用深能级瞬态谱(DLTS)技术系统研究了Si/SiO₂界面附近的深能级和界面态。结果表明,在热氧化形成的Si/SiO₂界面及其附近经常存在一个浓度很高的深能级,它具有若干有趣的特殊性质,例如它的DLTS峰高度强烈地依赖于温度,以及当栅偏压使费密能级与界面处硅价带顶的距离明显小于深能级与价带顶的距离时,仍然可以观测到一个很强的DLTS峰。另外,用最新方法测量的Si/SiO₂界面连续态的空穴俘获截面与温度有关,而与能量位置无明显关系,DLTS测 关键词：     

Surface photovoltage measurement in MOS structures

A method for the dc surface photovoltage measurement in MOS capacitors is proposed. Results of surface-photovoltage measurements performed for two kinds of MOS structures on p-type silicon substrates are presented. Comparison of them with results obtained form C-V characteristics exhibits a satisfactory conformity. Two groups of surface states beginning at E _t ¹ = E_v + 0.25 eV and E _t ² = E_c – 0.30 eV in the oxide-silicon interface of the investigated structures had been found.     

Generation of excess minority carriers in mos devices due to gamma irradiation

The effect of gamma irradiation on MOS devices prepared under different oxidation conditions Is investigated. The C-V characteristics of the devices are studied before and after exposing the latter with gamma radiations of CO⁶⁰ (1.17 and 1.33 MeV gamma rays). For MOS transistor (n-channel depletion type devices) the C-V characteristics change slightly towards the negative voltage axis and the C_min also decreases after Irradiation. For MOS capacitor (wet oxide) there is a change from high frequency C-V characteristics to low frequency C-V characteristics. In the case of a MOS capacitor (HCl grown) breakdown occurs relatively at lower voltage.     

Channel length effect in a MOSFET structure by scanning capacitance microscopy

Depth dependent carrier density and trapped charges in a metal-oxide-semiconductor field effect transistor (MOSFET) like structure have been studied using scanning capacitance microscopy (SCM). For a MOSFET structure, since minority carrier can be provided by the source and drain diffusions, its response time is shorter than that of metal-oxide-semiconductor (MOS) system. So the high frequency C-V relation is slightly different from that of MOS capacitor and shows the characteristics dependent on the channel length. Bias dependent SCM images which represent the depth dependent carrier density and detrapping time constant of trapped charges in the oxide layer were observed to see the channel effect in a MOSFET structure.     

Interfacial characteristics of Al/Al2O3/ZnO/n-GaAs MOS capacitor

The interfacial characteristics of Al/Al2O3/ZnO/n-GaAs metal-oxide-semiconductor (MOS) capacitor are investigated. The results measured by X-ray photoelectron spectroscopy (XPS) and high-resolution transmission electron microscopy (HRTEM) show that the presence of ZnO can effectively suppress the formations of oxides at the interface between the GaAs and gate dielectric and gain smooth interface. The ZnO-passivated GaAs MOS capacitor exhibits a very small hysteresis and frequency dispersion. Using the Terman method, the interface trap density is extracted from C-V curves. It is found that the ZnO layer can effectively improve the interface quality.     

部分耗尽SOI MOSFET总剂量效应与偏置状态的关系

实验表明SOI MOSFET掩埋氧化层中的总剂量辐射效应与辐射过程中的偏置状态有关. 对诱发背沟道泄漏电流的陷阱电荷进行了研究. 建立一个数值模型来模拟不同偏置下陷进电荷的建立, 它包括辐射产生的载流子复合和俘获的过程. 模拟结果与实验结果相符, 解释了总剂量辐射效应受偏置状态影响的机理.     

Effect of the oxidation process on SiO2/4H-SiC interface electrical characteristics

In this work we have compared the SiO₂/SiC interface electrical characteristics for three different oxidations processes (dry oxygen, water-containing oxygen and water-containing nitrogen atmospheres). MOS structures were fabricated on 8° off-axis 4H-SiC(0 0 0 1) n- and p-type epi-wafers. Electrical characteristics were obtained by I-V measurements, high-frequency capacitance-voltage (C-V) and ac conductance (G-ω) methods. Comparing the results, one observes remarkable differences between samples which underwent different oxidation routes. Among the MOS structures analyzed, the sample which underwent wet oxidation with oxygen as carrier gas presented the higher dielectric strength and lower values of interface states density.     

Wet thermal annealing effect on TaN/HfO2/Ge metal-oxide-semiconductor capacitors with and without a GeO2 passivation layer

Wet thermal annealing effects on the properties of TaN/HfO2/Ge metal-oxide-semiconductor(MOS) structures with and without a GeO2 passivation layer are investigated.The physical and the electrical properties are characterized by X-ray photoemission spectroscopy,high-resolution transmission electron microscopy,capacitance-voltage(C-V) and current-voltage characteristics.It is demonstrated that wet thermal annealing at relatively higher temperature such as 550℃ can lead to Ge incorporation in HfO2 and the partial crystallization of HfO2,which should be responsible for the serious degradation of the electrical characteristics of the TaN/HfO2/Ge MOS capacitors.However,wet thermal annealing at 400℃ can decrease the GeO x interlayer thickness at the HfO2/Ge interface,resulting in a significant reduction of the interface states and a smaller effective oxide thickness,along with the introduction of a positive charge in the dielectrics due to the hydrolyzable property of GeO x in the wet ambient.The pre-growth of a thin GeO2 passivation layer can effectively suppress the interface states and improve the C-V characteristics for the as-prepared HfO2 gated Ge MOS capacitors,but it also dissembles the benefits of wet thermal annealing to a certain extent.