焊球正六边形排布倒装芯片的下填充毛细压研究

除了正四边形,正六边形也是倒装芯片中可行的焊球排布形式,为了预测封装倒装芯片时的下填充过程,需要精确计算毛细驱动压.在已有的焊球正四边形排布情况下平均毛细压计算方法的基础上,进一步研究了焊球正六边形排布情况下平均毛细压计算模型.通过分阶段处理,并根据质量守恒和力平衡的原则,分析了下填充过程,重点分析了填充面积和接触线跳跃量的计算,进而得到了计算平均毛细压的数学模型.通过实例验证了该模型的准确性,从而完善了倒装芯片封装工艺中的下填充流动解析模型.     

倒装芯片下填充工艺的新进展(二)

为了增加在有机基板上倒装芯片安装的可靠性,在芯片安装后,通常都要进行下填充。下填充的目的是为了重新分配由于硅芯片和有机衬底间热膨胀系数失配产生的热应力。然而,仅仅依靠填充树脂毛细管流动的传统下填充工艺存在一些缺点。为了克服这些缺点,人们研究出了一些新的材料和开发出了一些新的工艺。     

倒装芯片下填充工艺的新进展(一)

为了增加在有机基板上倒装芯片安装的可靠性,在芯片安装后,通常都要进行下填充。下填充的目的是为了重新分配由于硅芯片和有机衬底间热膨胀系数失配产生的热应力。然而,仅仅依靠填充树脂毛细管流动的传统下填充工艺存在一些缺点。为了克服这些缺点,人们研究出了一些新的材料和开发出了一些新的工艺。     

固化残余应力对倒装焊底充胶可靠性的影响

通过对考虑固化过程影响的倒装焊底充胶的热－机械有限元模拟，分析了底充胶在固化过程中因体积收缩，材料的刚度增加及受周围材料的约束所产生的固化残余应力对随后热循环加载下底充胶应力分布与幅值的影响，得出了固化过程及其固化残余应力不但进一步劣化了热循环加载下底充胶中的应力值，而且还影响了随后底充胶的热－机械疲劳可靠性的结论。     

填充不流动胶的倒装焊封装中芯片的断裂问题

用断裂力学方法和有限元模拟分析了填充不流动胶芯片断裂问题.模拟时在芯片上表面中心预置一裂缝,计算芯片的应力强度因子和能量释放率.模拟表明,由固化温度冷却到室温时,所研究的倒装焊封装在填充不流动胶时芯片断裂临界裂纹长度为12μm,而填充传统底充胶时为20μm.模拟结果显示芯片断裂与胶的杨氏模量和热膨胀系数相关,与胶的铺展关系不大.焊点阵列排布以及焊点位置也会影响封装整体翘曲和芯片断裂.     

填充不流动胶的倒装焊封装中芯片的断裂问题

用断裂力学方法和有限元模拟分析了填充不流动胶芯片断裂问题 .模拟时在芯片上表面中心预置一裂缝 ,计算芯片的应力强度因子和能量释放率 .模拟表明 ,由固化温度冷却到室温时 ,所研究的倒装焊封装在填充不流动胶时芯片断裂临界裂纹长度为 12 μm,而填充传统底充胶时为 2 0 μm.模拟结果显示芯片断裂与胶的杨氏模量和热膨胀系数相关 ,与胶的铺展关系不大 .焊点阵列排布以及焊点位置也会影响封装整体翘曲和芯片断裂 .     

倒装芯片封装中非牛顿流体下填充的数值仿真

倒装芯片封装中的下填充工艺可以有效地提高封装连接的可靠性,因而得到了广泛应用。含有硅填料的环氧树脂是常用的下填充胶料,在下填充流动过程中表现出明显的非牛顿流体特性。利用Fluent软件对具有非牛顿流体特性胶料的下填充过程进行了三维数值模拟。采用流体体积比函数(VOF)对流动前沿界面进行追踪,再用连续表面张力(CSF)模型来计算下填充流动的毛细驱动力,并用幂函数本构方程来体现下填充胶料的非牛顿流体特性。通过数值模拟,获得了下填充流动前沿位置随时间变化的数据,这些数据与实验结果有较好的吻合度。该数值方法可较好地预测具有非牛顿流体性质胶料的下填充过程。     

Numerical Modeling for the Underfill Flow in Flip-Chip Packaging

In the prediction of underfill flow in a flip-chip package, numerical methods are usually used for flow analysis and simulation since analytical methods cannot meet the requirement for predicting fluid distribution in a planar analysis. At present, there appears to be no simulation software commercially available that is able to provide adequate prediction for the underfill flow process driven by capillary force in a micro-cavity situation. In the study presented in this paper, a numerical model was proposed for the prediction of flip-chip underfill flow. In this model, the power-law constitutive equation was used to describe the non-Newtonian behavior of encapsulant fluids and a time-dependent velocity boundary condition was used instead of the pressure boundary condition commonly used. The comparison between the model-predicted and experimental results indicated that this model can give a good prediction for the underfill flow in a micro-cavity. This model was implemented by a general-purpose commercially available software program ANSYS, which has a high reliability and wide accessibility.      

BGA焊点可靠性工艺研究

伴随高密度电子组装技术的发展,BGA(Ball Grid Array)成为高密度、高性能、多功能及高I/O数封装的最佳选择。文章分析了影响BGA焊点可靠性的关键因素,特别提出了减少焊点空洞缺陷和提高剪切强度的主要措施,并通过试验优化出各工艺参数。结果表明:运用优化的工艺参数制作的BGA焊点,焊接空洞以及芯片剪切强度有了明显改善,其中对BGA焊接样品进行150℃、1000h的高温贮存后,焊点的剪切强度完全满足GJB548B-2005的要求。     

基于表面能理论的倒装芯片封装下填充流动研究

为了预测倒装芯片封装中的下填充过程,通常要首先通过繁复的方法来求解平均毛细压.为了避免此问题,从能量的角度分析了倒装芯片封装工艺中的下填充流动过程.认为下填充是较低表面能的界面代替较高表面能的界面的过程,所释放的表面能用于形成流体流动的动能和克服阻力的能量损耗,期间能量守恒.在此分析的基础上建立了下填充流动的新模型.建立了可视化的下填充流动实验装置,并用下填充实验验证了所建立新模型的准确性.该模型避免了计算平均毛细压的复杂过程,并可方便地扩展到焊球排布形式不同的倒装芯片.     

An Analytical Model for Predicting the Underfill Flow Characteristics in Flip-Chip Encapsulation

This article describes an analytical model for the prediction of the underfill flow characteristics in a flip-chip package driven by capillary action. In this model, we consider non-Newtonian fluid properties of the encapsulant as opposed to most other studies where Newtonian fluid properties were assumed for the underfill flow. The power-law constitutive equation was applied in our study. The simulation based on this model agreed well with the measurement obtained from the experiments available in literature. It was further shown that this model performs better than the Washburn model traditionally used for the prediction of underfill flow characteristics in the flip-chip packaging. Based on this model, the effects of the solder bump pattern (including bump pitch, solder bump diameter, and gap height) on the process variables (i.e., flow front and filling time) were studied, which facilitated both the package design and the process optimization.     

倒装芯片下填充流动二维化数值分析方法的应用

下填充流动是确保倒装芯片可靠性的重要封装工艺,其流场和流动过程具有明显的二维特征,通过降维得到的二维化数值分析新方法能高效地模拟下填充流动过程.针对一种焊球非均匀、非满布的典型倒装芯片,用该数值分析方法模拟了单边下填充流动的过程,并用实验对模拟结果进行了检验.实验采用了可视化的下填充流动装置,倒装芯片试样采用硅-玻璃键合(SOG)方法制作.将数值模拟结果与实验结果比较发现,无论是流动速度还是流动前沿的形态,两者均呈现出较高的吻合度.这表明:针对下填充流动的二维化数值分析方法兼具高效性和准确性,具有较高的应用价值.     

助焊剂残留对底部填充粘接强度的影响

随着封装工艺的不断发展,芯片I/O数越来越多,高密度芯片封装必须采用倒装焊的形式。底部填充作为芯片倒装焊封装后的加固工艺,填充胶与倒装焊使用的助焊剂的兼容性对于研究倒装焊电路的长期可靠性至关重要。分析了底部填充胶与助焊剂的兼容性,以及助焊剂的残留对底部填充胶加固效果的影响。若助焊剂清洗不干净,会导致底部填充胶的粘接力下降,影响器件的质量。     

球形焊点三角形排列倒装芯片底部填充的能量法研究

对于具有球形焊点且呈正三角形排列的倒装芯片,由于其待填充的空隙结构复杂,难以通过平均毛细压来建立底部填充的解析模型.因此通过能量变化来分析底部填充过程以避免平均毛细压的计算.首先分析了底部填充过程中表面能的变化、动能的变化和流道壁面对流动的阻力损耗;然后根据能量守恒定律得到了反映底部填充过程的新解析模型;最后用计算流体力学(CFD)软件对底部填充过程进行了三维数值模拟,以此验证了基于能量法的新解析模型.能量法更具有通用性,可用于研究焊点形状和排列方式复杂的倒装芯片底部填充过程.     

提高BGA焊接的可靠性方法与实践

结合工作实际和经验，对BGA焊点失效的样品进行分析和BGA焊点的可靠性等问题进行论述，特别对PCB焊盘的选择、设计以及模板的开孔方式等的改进，提出一些改善BGA焊点质量和可靠性的工艺方法，在实践中取到很好的效果。     

无铅BGA封装可靠性的力学试验与分析

着重研究了机械冲击和应力对无铅BGA封装焊点可靠性的影响,介绍了BGA封装的可靠性力学试验(跌落、弯曲试验)及其分析方法.通过对力学试验中失效焊点的分析以及借助ANSYS模拟工具,找出引起失效的根本原因,为开发性能更好、高可靠性的无铅材料、改进无铅工艺提供依据.     

HTS and PCT Reliability of Chips and Flex Substrates Assembled Using a Thermosonic Flip-Chip Bonding Process

This study assesses the high-temperature storage (HTS) test and the pressure-cooker test (PCT) reliability of an assembly of chips and flexible substrates. After the chips were bonded onto the flexible substrates, specimens were utilized to assess the HTS test and PCT reliability. After the PCT and HTS tests, the die-shear test was applied to examine changes in die-shear forces. The microstructure of the test specimens was analyzed to evaluate reliability and to identify possible failure mechanisms. When the duration of the HTS test was increased, the percentage of gold bumps that peeled off from the surface of the copper pads on the chip side increased, and a crack was present at the bonding interface between the gold bumps and chip bond pads. This crack was due to thermal stress generated during the HTS test, and degraded the die-shear force of the assembly of chips and flexible substrates. After the PCT, the crack was present at the interface between deposited layers of copper electrodes after the specimens were subjected to the PCT for various durations. Moisture penetrated into the deposited layers of the copper electrodes, deposited layers lost their adhesion, and the crack progressed from the corner into the central bond area as the test duration increased. To improve the PCT reliability of assemblies of chips and flexible substrates using the thermosonic flip-chip bonding process, one must prevent moisture from penetrating into deposited layers of copper electrodes and prevent crack formation at the interface between nickel and copper layers. Underfill would be an effective approach to prevent moisture from penetrating into deposited layers during the PCT, thereby improving the reliability of the samples during the PCT.     

FC-CBGA封装中高速差分信号过孔的设计与优化

对FC-CBGA封装中高速差分信号过孔的设计与优化问题进行研究,分析了采用堆叠孔、增加地回流孔和增大过孔反焊盘尺寸这三种优化方法对减小电容和电感不连续性,以提高过孔电性能的具体影响.时频域仿真验证了所述优化方法能够有效降低高速差分信号插入损耗及回波损耗,提高信号过孔阻抗,改善高速差分信号传输性能.