Defect Oriented Testing of Analog Circuits Using Wavelet Analysis of Dynamic Supply Current

In recent years, Defect Oriented Testing (DOT) has been investigated as an alternative testing method for analog circuits. In this paper, we propose a wavelet transform based dynamic supply current (IDD) analysis technique for detecting catastrophic and parametric faults in analog circuits. Wavelet transform has the property of resolving events in both time and frequency domain simultaneously unlike Fourier transform which decomposes a signal in frequency components only. Simulation results on benchmark circuits show that wavelet transform has higher fault detection sensitivity than Fourier or time-domain methods and hence, can be considered very promising for defect oriented testing of analog circuits. Effectiveness of wavelet transform based DOT amidst process variation and measurement noise is studied.This research is supported in part by MARCO GSRC under contract number SA3273JB.A paper based on this work was presented at the Fourth IEEE Latin American Test Workshop, Natal, Brazil, February 2003.Swarup Bhunia received the undergraduate degree from Jadavpur University, Calcutta, India, and the Masters degree from the Indian Institute of Technology (IIT), Kharagpur. He is currently working toward the Ph.D. degree in the Department of Electrical Engineering, Purdue University, West Lafayette, IN.He has worked in the EDA industry on RTL synthesis and verification since 2000. His research interest includes defect-based testing, diagnosis, noise analysis, and noise-aware design.Arijit Raychowdhury received the B.E. degree in 2001 in electronics and telecommunication engineering from Jadavpur University, India. He is currently pursuing the Ph.D. degree in electrical and computer engineering in Purdue University, West Lafayette, IN.He has worked as an analog circuit designer in Texas Instruments India. His research interests include device/circuit design for scaled silicon and nonsilicon devices. He has received academic excellence awards in 1997, 2000, and 2001 and Messner Fellowship from Purdue University in 2002. Mr. Raychowdhury has been awarded the Best Student Paper Award in the IEEE Nanotechnology Conference, 2003.Kaushik Roy received the B.Tech. degree in electronics and electrical communications engineering from the Indian Institute of Technology, Kharagpur, India, and the Ph.D. degree from the Electrical and Computer Engineering Department, University of Illinois, Urbana, in 1990. He was with the Semiconductor Process and Design Center of Texas Instruments, Dallas, TX, where he worked on FPGA architecture development and low-power circuit design. He joined the electrical and computer engineering faculty, Purdue University, West Lafayette, IN, in 1993, where he is currently a Professor. His research interests include VLSI design/CAD with particular emphasis in low-power electronics for portable computing and wireless communications, VLSI testing and verification, and reconfigurable computing. He has published more than 250 papers in refereed journals and conferences, holds six patents, and is Co-Author of a book on Low Power CMOS VLSI Design (New York: Wiley). He was Guest Editor for a Special Issue on Low-Power VLSI in IEE Proceedings—Computers and Digital Techniques (July 2002). Dr. Roy received the National Science Foundation Career Development Award in 1995, the IBM Faculty Partnership Award, AT&T/Lucent Foundation Award, Best Paper Awards at the 1997 International Test Conference and 2000 International Symposium on Quality of IC Design, 2003 IEEE Latin American Test Workshop, and 2003 IEEE Nano. He is on the Editorial Board of IEEE Design and Test, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, and IEEE TRANSACTIONS ON VLSI SYSTEMS. He was Guest Editor for a Special Issue on Low-Power VLSI in IEEE DESIGN AND TEST (1994), and for the IEEE TRANSACTIONS ON VLSI SYSTEMS (June 2000).     

小波包变换频带划分在MELP声码器中的应用

提出了一种基于小波包变换划分信号频带的方法,并以此为基础对MELP声码器基音检测算法做出改进。原始语音信号经过多尺度正交小波包变换得到MELP声码器所要求的多种子带信号输出;然后对0-1KHZ和0-500Hz子带输出信号进行基音周期的估计。实验表明,该方法提取出的基音周期不仅具有较高的可靠性和精度,而且对环境噪声有较强的稳健性。     

Low-power Analog VLSI Implementation of Wavelet Transform

For applications requiring low-power, low-voltage and real-time, a novel analog VLSI implementation of continuous Marr wavelet transform based on CMOS log-domain integrator is proposed.Mart wavelet is approximated by a parameterized class of function and with Levenbery-Marquardt nonlinear least square method,the optimum parameters of this function are obtained.The circuits of implementating Mart wavelet transform are composed of analog filter whose impulse response is the required wavelet.The filter design is based on IFLF structure with CMOS log-domain integrators as the main building blocks.SPICE simulations indicate an excellent approximations of ideal wavelet.     

连续小波变换开关电流电路的实现

提出了一种用开关电流电路实现连续小波变换的方法,将连续小波变换转化为用带通滤波器组对信号进行处理,并用开关电流电路实现该带通滤波器组.文章采用基于第二代开关电流技术的带通滤波器组实现了8通道的Marr小波.仿真结果表明该滤波器组具有恒Q值,且每个带通滤波器的中心频率与理论值大致相符,从而证实了该方法的可行性.     

基于开关电流技术的连续小波变换的实现方法

开关电流技术是一种新的模拟抽样数据处理技术。开关电流电路具有一般电路不具有的优点，与标准数字CMOS工艺兼容。连续小波变换是分析非平稳信号的有力工具，在信号处理上有广泛的应用。本文提出用开关电流技术实现连续小波变换的方法，并用Matlab仿真证明了其理论可行性。     

基于小波变换的非平稳信号瞬时频率分析方法

利用小波变换的优越时频分辨特性,对非平稳信号的瞬时频率进行了分析,给出了模拟仿真结果,并与短时傅立叶变换作比较,得出了两者对信号瞬时频率分析的适用范围及各自的优缺点。     

数模混合电路实现一维模拟小波变换芯片

整个电路采用标准CMOS工艺,采取模块化设计的方法,把数字频率发生器和模拟滤波器部分分开设计。数字频率发生器采用直接数字综合(DDS)的方式,来产生5种不同中心频率(10个通道),简化了传统模拟压控振荡器(VCO)的设计,提高了频率发生器的灵活性;根据精度要求,模拟高斯低通滤波器采用5阶低通滤波器来进行逼近。并论述和讨论了一种用数字和模拟混合集成电路来实现一维模拟输入的连续小波变换(CWT)芯片的方法。     

相参脉冲序列频率估计的小波变换方法

在单站无源定位与跟踪系统中,接收信号的多普勒频率变化率信息对运动目标的状态估计和定位非常重要。对于脉冲体制的雷达来说,信号持续时间较短,很难精确测量多普勒频率变化率。小波变换在时频域同时具有良好的局域特性和较低的信噪比门限。文章引入了小波变换方法实现单站无源定位与跟踪系统的参数估计,推导了相参脉冲序列的小波变换方法。数值仿真证明该方法能实现脉冲的相参积累,大幅提高参数的估计精度。     

一种动态电流测试产生方法的SPICE模拟验证

数字电路状态发生改变时,数字电路中的逻辑跳变直接影响电路中的动态电流.基于布尔过程的波形模拟器能够快速准确地对电路进行模拟,其结果既能反映电路的逻辑特性又能反映电路的定时特性.利用波形模拟器可以准确的了解电路中跳变的情况.本文利用波形模拟器改进并实现了一种基于逻辑跳变计数的动态电流测试方法.对于S208电路中的部分开路故障和延时故障,本文用该方法产生了一组测试结果,并利用SPICE软件对这些测试结果进行了模拟实验.模拟结果表明,对于某些故障,测试向量对能够使故障电路的动态电流和无故障电路的动态电流产生较大的差别.通过比较两者平均动态电流的大小,我们能够区分出故障电路和无故障电路.实验结果验证了本文中的动态电流测试产生方法的有效性和可行性.     

用声表面波器件实现小波变换

根据声表面波器件的卷特性,对声表面波器件实现小波变换进行了理论推导,说明了用声表面波器件实现小波变换具有的可行性和优越性。根据这些理论设计的实例和模拟结果表明,用声表面波器件实现小波变换的方法具有快速、实用和与数字处理系统（借助A／D和D／A变换器）相兼容等优点,对小波变换的应用有重要价值。     

Dynamic Power Supply Current Testing of CMOS SRAMs

We describe the design and implementation of a dynamic power supply current sensor which is used to detect SRAM faults such as disturb faults as well as logic cell faults. A formal study is presented to assess the parameters that influence the sensor design. The sensor detects faults by detecting abnormal levels of the power supply current. The sensor is embedded in the SRAM and offers on-chip detectability of faults. The sensor detects abnormal dynamic current levels that result from circuit defects. If two or more memory cells erroneously switch as a result of a write or read operation, the level of the dynamic power supply current is elevated. The sensor can detect this elevated value of the dynamic current. The dynamic power supply current sensor can supplement the observability associated with any test algorithm by using the sensor as a substitute for the read operations. This significantly reduces the test length and the additional observability enhances defect coverages.     

用计算全息制作改进的Mexican-hat子波匹配滤波器实现二维光学子波变换

提出了应用计算全息制作改进的Ｍｅｘｉｃａｎ－ｈａｔ子波匹配滤波器,在一个光学４ｆ系统中实现了二维子波变换,给出了简要的理论分析和实验结果,实验结果与计算机模拟完全一致。     

基于人眼视觉灰度识别特性的图像动态范围小波变换处理方法

常用的图像传感器由于电荷耦合器(CCD)和模数转换器(ADC)的限制,动态范围大约只有60dB,与人眼的动态范围(110dB)不符,导致获取的图像丢失部分细节信息。针对这一问题,提出了基于小波变换的图像动态范围扩展技术。通过对同一场景进行多次拍摄,获得不同曝光时间的源图像,对源图像运用多尺度小波变换分解为高频部分和低频部分。将基于人眼的视觉灰度识别特性的方法应用于低频部分的处理中,运用不同的权重值进行处理,尽可能保留图像的背景信息。对高频部分运用局部最大方差准则进行融合,尽量保留图像的边缘特性。将融合后的高频部分和低频部分利用逆小波变换进行重构。试验结果表明,重构后的图像与适度曝光的图像相比,在高亮度区域和低亮度区域的细节信息得到了复原,动态范围得到了显著的扩展。     

Frequency Response Verification of Analog Circuits Using Global Optimization Techniques

This paper develops a new formal technique to verify the frequency response of analog circuits using global optimization techniques. Since simulation-based approaches are unable to cover the design space, there is a need for formal approaches to verify large circuits. Drawing parallels from the digital domain, the verification problem in the analog domain is modeled as a non-linear optimization problem and solved using global optimization techniques by ensuring that the implementation response is bounded within an envelope around the specification. We also address the problem of verifying frequency response under the influence of parameter variations. Direct as well as indirect techniques are illustrated using accurate frequency response models. Experimental results are presented to show the effectiveness of the proposed methodology.     

Fault Diagnosis of Nonlinear Analog Circuits Using Neural Networks with Wavelet and Fourier Transforms as Preprocessors

A neural-network based analog fault diagnostic system is developed for nonlinear circuits. This system uses wavelet and Fourier transforms, normalization and principal component analysis as preprocessors to extract an optimal number of features from the circuit node voltages. These features are then used to train a neural network to diagnose soft and hard faulty components in nonlinear circuits. Our neural network architecture has as many outputs as there are fault classes where these outputs estimate the probabilities that input features belong to different fault classes. Application of this system to two sample circuits using SPICE simulations shows its capability to correctly classify soft and hard faulty components in 95% of the test data. The accuracy of our proposed system on test data to diagnose a circuit as faulty or fault-free, without identifying the fault classes, is 99%. Because of poor diagnostic accuracy of backpropagation neural networks reported in the literature (Yu et al., Electron. Lett., Vol. 30, 1994), it has been suggested that such an architecture is not suitable for analog fault diagnosis (Yang et al., IEEE Trans. on CAD, Vol. 19, 2000). The results of the work presented here clearly do not support this claim and indicate this architecture can provide a robust fault diagnostic system.     

一种基于小波脊时频分析的差分跳频信号检测方法

针对差分跳频信号频带宽、跳速快、检测难的问题,在分析比较短时傅里叶变换(STFT)的基础之上,提出一种通过提取小波脊进行时频分析和参数估计的信号检测方法。该方法的检测效果明显优于短时傅里叶变换,当信噪比大于-7 dB时,在不要求高采样率的情况下,对于差分跳频信号的参数估计是有效的。     

基于小波变换和DCT的字符图像特征抽取新方法

从特征矢量的不变性和抗噪性角度,提出了一种基于小波变换(WT)和离散余弦变换(DCT)的字符特征抽取新方法。利用圆周投影算法,把二维的字符图像转换为一维投影。基于WT和DCT的非线性变换,克服了因变形和噪声引起的一维投影的非线性变形失真。通过对识别不同大小、方向及噪声的字符仿真实验和不同特征抽取方法的对比实验,以及对工业标牌字符的识别,表明该特征抽取方法具有尺度和旋转不变性,有较好的抗噪声能力和很好的分类性能。     

感性负载下电源输出滤波器的动态响应

给出了电源负载为感性负载时的输出滤波器的动态响应特性，同时给出了其响应函数，并就几个相关物理量进行了讨论。     

基于小波变换的动态心电图波形特征聚类研究

研究了动态心电图(Holter)中的心电波形聚类,找到了占据大部分心电波形的基本波形.以二次样条小波变换(WT)方法检测Holter中的R波,从而确定完整心动周期的波形.同时根据WT找到心电波形中极值点及其相关斜率,利用自组织映射(SOM)神经网络进行心电波形的聚类,完成特征提取.通过实验表明,Holter的R波检测率达到99.5%,相对于基于人工神经网络、线性滤波器等方法要好;24 h的Holter中所包含的106次心电基本波形的识别率达到91.4%,达到了将心电数据分析量降为5～10 %的目的.     

声表面波式指宽变长小波变换处理器的设计

为消除声表面波式小波变换处理器压电基片对频率特性的影响,以及输出换能器的指条数对带宽的影响和解决衍射问题,研制了声表面波式指宽变长小波变换处理器。该处理器选取机电耦合系数为0.64%的X-112°Y LiTaO_3压电基片,输出换能器指条数为36,输入换能器采用指宽变长且声孔径均匀的叉指换能器。设计和制作了尺度2-2声表面波式指宽变长小波变换处理器样品。实验结果表明,声表面波式指宽变长小波变换处理器频率特性曲线光滑,-3dB实验带宽为1.072 MHz,与理论带宽值一致,且不存在衍射问题。