CVD-SiO2 and plasma-SiNx films as Zn diffusion masks for GaAs

The effectiveness of plasma-deposited SiN_x and chemical-vapor-deposited SiO₂ as masks for localized diffusion at 600°C of Zn in GaAs has been investigated. Variables included the diffusion time (0.25-16 hrs), and the mask thickness (0.1-0.5 Μm) for both SiO₂ and SiN_x films, and the deposition temperature (300-500°C) and the phosphorous content (0-8 wt.%) for SiO₂ films. Diffusion windows were defined photolithographically and opened by etching in buffered HF or by reactive ion etching of CF₄. Profiles of p-n junctions associated with the Zn diffusion were determined by scanning electron microscopy of an etched cleaved section. Films of SiN_x formed effective diffusion masks, but for masks of SiO₂, enhanced diffusion of Zn took place along the substrate-mask interface, with sideways-to-depth diffusion ratios up to 10. The Inclusion of P in SiO₂ masks reduced, but did not eliminate, this effect. Mechanisms which may contribute to the enhanced sideways diffusion include strain, diffusion through the mask, and degradation of the masksubstrate interface. It is shown that the first of these mechanisms has only a minor effect.     

Atomic force microscopy studies of CdTe films grown by epitaxial lateral overgrowth

Epitaxial lateral overgrowth (ELO) of CdTe was carried out on GaAs using silicon nitride as the mask material. Windows were delineated on silicon, nitride mask deposited on GaAs substrates and CdTe was grown using metalorganic vapor phase epitaxy. The films were characterized by atomic force microscopy (AFM). It has been shown that highly selective growth of CdTe can be achieved at temperatures higher than 500 C and pressures lower than 25 torr using silicon nitride as the mask layer. Optimizing the growth conditions as well as the stripe directions on the substrates enables the growth of ELO-CdTe with a flattop surface and vertical sidewalls. AFM studies show that ELO-grown CdTe contains large grains with reduced defect densities, but there seems to be no difference on the films grown on the window region or on the masked region. The results suggest that the growth mechanism for CdTe growth on GaAs is different from that of ELO-grown GaN. A possible growth model for the patterned CdTe growth is also proposed.     

Optical properties of annealed,single GaAs quantum wells: Cap doping and mask width dependence

Band edge absorption measurements are used to characterize the degree of Al-Ga intermixing (blue-shifting) and the linear optical loss of waveguides formed in five annealed and encapsulated single GaAs quantum well laser heterostructure wafers which differed only by the amount of Zn doping in the GaAs cap layer. In addition to the transmission measurements, secondary ion mass spectroscopy data was used to verify the diffusion of Zn before and after annealing. High zinc doping in the cap is observed to cause quantum well disordering below the encapsulant (Si₃N₄) and is attributed to impurity induced layer disordering. Moderate doping in the cap results in selective area intermixing via controlled gallium vacancy production. A stripe width dependence is also observed, which suggests a role of lateral diffusion of species which affect the intermixing. For an undoped (n⁻) cap, the degree of intermixing is heavily dependent on the arsenic overpressure used during the anneal and is independent of the nitride stripe width suggestive of a volumetric Fermi level dependent production of vacancies within the cap.     

Structural and electrical properties of plasma-deposited silicon nitride from SiH4-N2 gas mixture

Plasma-deposited silicon nitride films were produced from SiH₄-N₂ gas mixture. Their composition, chemical bonds, and electrical properties were investigated by varying the deposition conditions. The silicon nitride films from SiH₄-N₂ gas mixture exhibit (i) less hydrogen, (ii) higher thermal endurance, (iii) higher density, and (iv) smaller etching rate than those of the films deposited from SiH₄, and NH₃ gas mixture. These results can be partly attributed to lower hydrogen concentration. As the Si/N ratio approaches the stoichiometric value, 0.75, the resistivity and the breakdown strength are increased. They are 10¹⁵Ωcm and 9MV/cm, respectively, at Si/N≃0.85. Interface state density between silicon and silicon nitride layers is as low as 1& #x223C; 5xl0¹¹cm⁻² eV⁻¹. On leave from The Northwest Telecommunication Engineering Institute, Xi’an, The People’s Republic of China.     

Impurity-induced disordering of AlxGa1−xAs-GaAs quantum well heterostructures with (Si2)x(GaAs)1−x barriers

Recent work indicates that the alloy (Si₂)_x(GaAs)_1−x can be formed within the GaAs quantum well of an Al_xGa_1−xAs-GaAs quantum well heterostructure (QWH) and results in a shift of laser operation to higher energy. In this paper we show, by SIMS and EDS measurements, that the Si concentration in the (Si₂)_x(GaAs)_1−x layer far exceeds typical “doping” levels. The stability of these QWHs has been investigated with respect to thermal annealing and Zn impurity-induced layer disordering (Zn-IILD). Data are presented showing that the (Si₂)_x(GaAs)_1−x alloy is stable against thermal annealing unless a rich source of Ga vacancies is provided, and that relatively low temperature Zn diffusion greatly enhances the disordering process of the alloy layer.     

Use of a sputtered SiO2 coating for surface protection during `leaky tube? diffusion of Zn into GaAs

Thin SiO2 layers, deposited by low-power room-temperature sputtering, have been employed as surface protection coatings during Zn diffusion into GaAs. These layers prevent surface erosion of the GaAs, but allow the Zn diffusion to proceed with negligible attenuation. The use of arsenic over-pressure during diffusion can thus be avoided.     

Low temperature cleaning of Si by a H2/AsH3 plasma prior to heteroepitaxial growth of GaAs by metalorganic chemical vapor deposition (MOCVD)

A method using a H₂/AsH₃ plasma to clean the Si surface before GaAs heteroepitaxy was investigated and the dependence of the effectiveness of this treatment on arsine partial pressure was studied. Thin GaAs-on-Si films deposited on the plasma-cleaned Si were analyzed using plan-view TEM, HRXTEM and SIMS. Although not optimized, this method of Si cleaning makes heteroepitaxial deposition of GaAs possible. Some roughening of the Si surface was observed and a possible explanation is offered. Using the results of this study, thick (2.5–3.0μm) epitaxial GaAs films were then deposited and their quality was evaluated using RBS, XTEM and optical Nomarski observation. All Si surface cleaning and GaAs deposition were carried out at temperatures at or below 650°.     

Optical detector to monitor plasma etching

A simple photodetector has been developed to monitor plasma etching of polysilicon, pyrolytic silicon nitride and reactive plasma deposited silicon nitride.     

用PECVD法制备SiO_2进行Zn在GaAs中掩蔽扩散研究

本文报导丁GaAs表面上淀积液态源PECVD-SiO_2膜掩蔽Zn扩散的规律,估算了Zn在SiO_2膜和GaAs中扩散系数的比值为(1.04～1.85)×10~(-3),在700℃下Zn在GaAs中的横向扩散为结深的3～7倍。这种方法制备的SiO_2膜已应用于GaAs电调变容二极管和LPE-Ga_(1-x)Al-xAs/GaAs DH激光器的研制。     

Preparation and characterization of thin films of MgO,Al2O3 and MgAl2O4 by atomic layer deposition

MgO, Al₂O₃ and MgAl₂O₄ thin films were deposited on silicon substrates at various temperatures by the atomic layer deposition (ALD) method using bis(cyclopentadienyl)magnesium, triethylaluminum, and H₂O and were characterized systematically. High-quality polycrystalline MgO films were deposited for a substrate temperature above 500°C, and amorphous thin films were deposited around 400°C. The deposited Al₂O₃ and MgAl₂O₄ thin films were characterized as amorphous in structure. Applicability of ALD to complex oxides is discussed.     

Influence of arsenic vapor pressure during copper diffusion on deep level formation in silicon-doped gallium arsenide

The effect of arsenic vapor pressure during copper diffusion on deep level formation in silicon-doped gallium arsenide has been studied using photoinduced current transient spectroscopy. From the findings, models for the copper-related complexes in GaAs are identified. Capping effect of deposited copper layer is investigated. Deep levels with activation energies of 0.14 eV, 0.32 eV, and 0.45 eVhave been identified, which are attributed to Cu_Ga, Si_Ga Cu_Ga complex, and V_AsCu_GaV_As complex, respectively.     

Reduction of the parasitic charge generation during silicon nitride deposition in a LOCOS isolation without field implant

MOS integrated circuits use the Local oxidation of silicon to isolate laterally adjacent devices (LOCOS isolation). The insulation structure is typically formed by a semiconductor region doped by ion implantation (field implant) and covered by a thick thermal oxide (field oxide). Other insulators (plasma enhanced chemical vapor deposited (PECVD) silicon oxides and LPCVD silicon nitride) and metal interconnection are subsequently deposited on the field oxide. The ion implant together with the thick insulator ensure a high threshold voltage value of the parasitic MOS transistor formed by source and drain of the adjacent active devices and by the insulator/interconnection gate.However, economical purpose leads to the extension of the application field of lower cost technology, addressing the problem of LOCOS isolation without any field implant. As already shown in a previous work [Fay JL, Beluch J, Allirand L, Brosset D, Despax B, Bafleur M, Sarrabayrose G. Jpn J Appl Phys 38(9A):5012–7] for inter-layer dielectric applications, our PECVD oxides suffer from excessive concentration of fixed positive charges brought about by the silicon nitride deposition, and causing the N-channel field threshold voltage to decrease.Characterization reveals that these charges are generated by diffusion of species coming from the gas phase during the silicon nitride process. These generated charges can be reduced either by increasing the O₂/tetra-ethyl orthosilicate ratio or by doping the oxide with boron and phosphorus. To avoid diffusion and generation of charges, we minimized the thermal budget using a PECVD silicon nitride. With this process, we have achieved a high threshold voltage and an acceptably low leakage current of the NMOS parasitic transistor.     

Vapor-grown In1−xGaxP electroluminescent junctions on GaAs

In_1?xGa_xP vapor-grown electroluminescent junctions have been deposited directly onto GaAs substrates. For these layers, an alloy composition within a few mole percent of the lattice-matching composition of 51.5 mole percent GaP has been found to be essential for high luminous efficiencies and for the avoidance of microcracks throughout the epitaxial layer. For In_1?xGa_xP alloys near this composition, the electroluminescence characteristics of the diodes have been found to be excellent, with room-temperature external quantum efficiencies as high as 0.2% attained for red emission near 6600 Å. The properties of In_.5Ga_.5P junction structures deposited directly onto GaAs ar? compared with those of In_1?xGa_xP layers previously prepared on GaP substrates.     

Influence of post deposition annealing on Y2O3-gated GaAs MOS capacitors and their reliability issues

The feasibility of employing yttrium oxide (Y₂O₃) as high-k gate dielectrics for GaAs metal-oxide-semiconductor (MOS) devices has been investigated. MOS capacitors were fabricated using RF-sputtered deposited Y₂O₃ films on NH₄OH treated n-GaAs substrate. Indeed high-k (Y₂O₃)/GaAs MOS capacitors exhibiting fairly good electrical characteristics, for instance, especially low leakage current density, low hysteresis and allowable density of interface states, have been achieved. The effects of several annealing treatments on Y₂O₃-gated GaAs MOS capacitors have been investigated in order to optimize the process conditions. A decrease in accumulation capacitance (C_acc) following PDA effectively increases the equivalent oxide thickness (EOT), which is predicted to be correlated with the growth and continuous increase in the physical thickness of a lower-k inter-layer sandwiched between Y₂O₃ and GaAs. However, leakage currents and interface trap densities are reduced with higher values of annealing temperature. The variation of current density with an equivalent oxide thickness (EOT) has also been investigated.     

Dependence of Zn diffusion on the Al content in Ga1−xAlxAs

Zn diffusion in Ga_1?xAl_xAs as a function of Al content has been studied. From the diffusion depth measurements a dependence of the diffusion rate on the Al content has been found and the reason discussed. The use of the GaAs epilayer as a mask for Zn diffusion in Ga_1??xAl_xAs was demonstrated.     

Iron nitride mask and reactive ion etching of GaN films

One of the major GaN processing challenges is useful pattern transfer. Serious photoresist mask erosion and hardening are often observed in reactive ion etching of GaN. Fine pattern transfer to GaN films using photoresist masks and complete removal of remaining photoresist after etching are very difficult. By replacing the etch mask from conventional photoresist to a sputtered iron nitride (Fe-8% N) film, which is easily patterned by wet chemical etching and is very resistive to Cl based plasmas, GaN films can be finely patterned with vertical etched sidewalls. Successful pattern transfer is realized by reactive ion etching using Cl (H) containing plasmas. CHF₃/Ar, C₂ClF₅/Ar, C₂ClF₅/Ar/O₂, SiCl₄, and CHCl₃ plasmas were used to etch GaN. The GaN etch rate is dependent on the crystalline quality of GaN. Higher crystalline quality GaN films exhibit slower etch rates than GaN films with higher dislocation and stacking fault density.     

Photoluminescence spectroscopy of localized excitons in Si1−xGex

We have recently found that high quantum efficiency can be achieved in strained Si_1−xGe_x alloy layers through the elimination of nonradiative channels. We observed a photoluminescence process in SiGe grown on 〈100232A; silicon by rapid thermal chemical vapor deposition, which was attributed to free excitons localized by random fluctuations in alloy composition. The external quantum efficiency of this process was measured directly for a single Si_0.75Ge_0.25 quantum well and found to be extraordinarily high, about 11.5 ± 2%. In this paper, we present additional data on the localized exciton photoluminescence, including temperature dependence, time decay curves, and effects of sample annealing.     

Deposition and characterization of Pb TiO3 thin films on silicon wafers using metalorganic sources

Ferroelectric PbTiO₃ thin films were deposited on bare silicon and Pt/SiO₂/Si substrates by metalorganic chemical vapor deposition in a temperature range from 270 to 550°C. The deposition of a single phase PbTiO₃ thin film did not occur on bare silicon substrates. Instead a double layer of lead-silicate and PbTiO₃ was formed owing to a serious diffusion of lead and oxygen ions into silicon substrates. But on Pt/SiO₂/Si substrates, a single phase PbTiO₃ oriented parallel to a-and c-axis was grown at a substrate temperature as low as 350°C even without a high temperature post-annealing. To get an optimal film, a precise control of input gas composition and also a deposition in a low temperature range from 350 to 400°C are necessary.     

Towards van der Waals Epitaxial Growth of GaAs on Si using a Graphene Buffer Layer

Van der Waals growth of GaAs on silicon using a two‐dimensional layered material, graphene, as a lattice mismatch/thermal expansion coefficient mismatch relieving buffer layer is presented. Two‐dimensional growth of GaAs thin films on graphene is a potential route towards heteroepitaxial integration of GaAs on silicon in the developing field of silicon photonics. Hetero‐layered GaAs is deposited by molecular beam epitaxy on graphene/silicon at growth temperatures ranging from 350 °C to 600 °C under a constant arsenic flux. Samples are characterized by plan‐view scanning electron microscopy, atomic force microscopy, Raman microscopy, and X‐ray diffraction. The low energy of the graphene surface and the GaAs/graphene interface is overcome through an optimized growth technique to obtain an atomically smooth low­ temperature GaAs nucleation layer. However, the low adsorption and migration energies of gallium and arsenic atoms on graphene result in cluster‐growth mode during crystallization of GaAs films at an elevated temperature. In this paper, we present the first example of an ultrasmooth morphology for GaAs films with a strong (111) oriented fiber‐texture on graphene/silicon using quasi van der Waals epitaxy, making it a remarkable step towards an eventual demonstration of the epitaxial growth of GaAs by this approach for heterogeneous integration.     

Diffusion of zinc into gaas through Al0.3Ga00.7As

The diffusion of zinc into GaAs, Al_0.3Ga_0.7As and Al_0.3Ga_0.7As/GaAs single heterostructures have been studied. The depth of the diffusion front is found to be proportional to the square root of the diffusion time, [t]^1/2, and for single heterostructures the Al_0.3Ga_0.7As layer thickness,d ₁ modifies this relationship through decreasing the junction depth byd ₁ multiplied by a constant. It is shown that this relationship can be used for predicting diffusion fronts in double heterostructures.