A NOVEL PHASE CONTROL TECHNIQUE FOR INJECTION LOCKED OSCILLATORS

A novel technique to obtain injection locked oscillators phase tuning beyond 180° is demonstrated. The idea is to cascade injection locked oscillators together for phase change accumulation. A two stage injection locked oscillators can theoretically provide a maximum of 360?phase change within the locking range. This is particularly useful for phased array antenna applications.     

A reliable ground bounce noise reduction technique for nanoscale CMOS circuits

Power gating is the most effective method to reduce the standby leakage power by adding header/footer high-V_TH sleep transistors between actual and virtual power/ground rails. When a power gating circuit transitions from sleep mode to active mode, a large instantaneous charge current flows through the sleep transistors. Ground bounce noise (GBN) is the high voltage fluctuation on real ground rail during sleep mode to active mode transitions of power gating circuits. GBN disturbs the logic states of internal nodes of circuits. A novel and reliable power gating structure is proposed in this article to reduce the problem of GBN. The proposed structure contains low-V_TH transistors in place of high-V_TH footer. The proposed power gating structure not only reduces the GBN but also improves other performance metrics. A large mitigation of leakage power in both modes eliminates the need of high-V_TH transistors. A comprehensive and comparative evaluation of proposed technique is presented in this article for a chain of 5-CMOS inverters. The simulation results are compared to other well-known GBN reduction circuit techniques at 22 nm predictive technology model (PTM) bulk CMOS model using HSPICE tool. Robustness against process, voltage and temperature (PVT) variations is estimated through Monte-Carlo simulations.     

A study of phase noise in CMOS oscillators

This paper presents a study of phase noise in two inductorless CMOS oscillators. First-order analysis of a linear oscillatory system leads to a noise shaping function and a new definition of Q. A linear model of CMOS ring oscillators is used to calculate their phase noise, and three phase noise phenomena, namely, additive noise, high-frequency multiplicative noise, and low-frequency multiplicative noise, are identified and formulated. Based on the same concepts, a CMOS relaxation oscillator is also analyzed. Issues and techniques related to simulation of noise in the time domain are described, and two prototypes fabricated in a 0.5-μm CMOS technology are used to investigate the accuracy of the theoretical predictions. Compared with the measured results, the calculated phase noise values of a 2-GHz ring oscillator and a 900-MHz relaxation oscillator at 5 MHz offset have an error of approximately 4 dB     

A general theory of phase noise in electrical oscillators

A general model is introduced which is capable of making accurate, quantitative predictions about the phase noise of different types of electrical oscillators by acknowledging the true periodically time-varying nature of all oscillators. This new approach also elucidates several previously unknown design criteria for reducing close-in phase noise by identifying the mechanisms by which intrinsic device noise and external noise sources contribute to the total phase noise. In particular, it explains the details of how 1/f noise in a device upconverts into close-in phase noise and identifies methods to suppress this upconversion. The theory also naturally accommodates cyclostationary noise sources, leading to additional important design insights. The model reduces to previously available phase noise models as special cases. Excellent agreement among theory, simulations, and measurements is observed     

A technique for measuring FM noise in microwave oscillators

Previous methods of analyzing the low-frequency noise spectrum of microwave oscillators have employed the usual scanning-type spectrum analyzer or an arrangement of fixed-tuned filters. The visual presentation of the spectrum analyzer makes high accuracy difficult, while a series of filters does not provide the necessary frequency discrimination. The present system makes use of a chart recorder to present noise level versus frequency as a continuous plot from 0 to 16,000 cycles.     

A phase noise reduction technique in microwave oscillator using high-Q active filter

The authors present a 10 GHz oscillator that uses a high-Q active filter to reduce the phase noise. The loaded Q of active filter is obtained at about 500. This oscillator is compared with another oscillator which uses a passive filter. The difference of two oscillators' Q is estimated at 12.5 times the open-loop gain simulation. The measured result of phase noise at 100 kHz offset shows maximum 10 dB reduction with high-Q active filter.     

Jitter and phase noise in ring oscillators

A companion analysis of clock jitter and phase noise of single-ended and differential ring oscillators is presented. The impulse sensitivity functions are used to derive expressions for the jitter and phase noise of ring oscillators. The effect of the number of stages, power dissipation, frequency of oscillation, and short-channel effects on the jitter and phase noise of ring oscillators is analyzed. Jitter and phase noise due to substrate and supply noise is discussed, and the effect of symmetry on the upconversion of 1/f noise is demonstrated. Several new design insights are given for low jitter/phase-noise design. Good agreement between theory and measurements is observed     

A novel frequency doubler using feedforward technique and defected ground structure

A novel design of frequency doubler using feedforward technique and defected ground structure (DGS) is proposed. The feedforward loop in the proposed frequency doubler suppresses the fundamental component (f/sub o/), and the DGS diminishes the higher order harmonics such as third, fourth, and so on. Due to the combination of feedforward structure and DGS, only the doubled frequency component (2f/sub o/) appears at the output port and the other unwanted components are suppressed excellently. A frequency doubler is designed at 1.85GHz of f/sub o/ by the proposed technique and measured. The measured output power of 2f/sub o/ is -3 dBm when the input power is 0 dBm. The obtained suppression of f/sub o/, 3f/sub o/, and 4f/sub o/ are 42.9, 19.2, and 29.7dB, respectively.     

A study of phase noise in colpitts and LC-tank CMOS oscillators

This paper presents a study of phase noise in CMOS Colpitts and LC-tank oscillators. Closed-form symbolic formulas for the 1/f/sup 2/ phase-noise region are derived for both the Colpitts oscillator (either single-ended or differential) and the LC-tank oscillator, yielding highly accurate results under very general assumptions. A comparison between the differential Colpitts and the LC-tank oscillator is also carried out, which shows that the latter is capable of a 2-dB lower phase-noise figure-of-merit (FoM) when simplified oscillator designs and ideal MOS models are adopted. Several prototypes of both Colpitts and LC-tank oscillators have been implemented in a 0.35-/spl mu/m CMOS process. The best performance of the LC-tank oscillators shows a phase noise of -142dBc/Hz at 3-MHz offset frequency from a 2.9-GHz carrier with a 16-mW power consumption, resulting in an excellent FoM of /spl sim/189 dBc/Hz. For the same oscillation frequency, the FoM displayed by the differential Colpitts oscillators is /spl sim/5 dB lower.     

Waveform symmetry properties and phase noise in oscillators

The authors formalise and expand an empirically observed waveform symmetry condition which minimises the transformation of low-frequency noise into the close-in phase noise spectrum of an electrical oscillator. The result provides an insight into the impact of waveform symmetry on the phase noise performance of electrical oscillators     

Minimum achievable phase noise of RC oscillators

To make RC oscillators suitable for RF applications, their typically poor phase-noise characteristics must be improved. We show that, for a given power consumption, this improvement is fundamentally limited by the fluctuation-dissipation theorem of thermodynamics. We also present the analytical formulation of this limit for relaxation (including ring) oscillators using a time-domain phase-noise analysis method which is introduced in this paper. Measurement shows the maximum possible improvement is generally less than 6dB for ring oscillators, while it can be as high as 21dB for other relaxation oscillators. The suboptimal performance of relaxation oscillators is attributed to the continuous current flow in these oscillator topologies. These results provide useful insight for feasibility studies of oscillator design.     

S波段低相噪振荡器的设计

基于ADS软件仿真,提出了S波段低相噪振荡器的设计方案。该振荡器采用了100MHz低相噪晶体振荡器和倍频链电路的组合,通过三次倍频来实现2GHz的单点频输出,并且在倍频过程中尽量地让相位噪声按照20lgN恶化。实测结果表明,振荡器输出信号的相位噪声在偏移1kHz处可达到-155dBc/Hz,最终输出信功率大于10dBm,谐波抑制大于25dBc。     

New implementation of injection locked technique and its application to low phase noise quadrature oscillators

A new implementation of the injection locked technique is proposed. The incident signal is directly injected into the common-source connection node of the sub-harmonic oscillator instead of the gate of the tail current source, and a narrowband noise filtering network is inserted into the same node to suppress the tail current source noise. A novel quadrature oscillator with the proposed injection locked technique is presented. The simulations show that the phase noise of the quadrature oscillator is about 7 dB better than that of the stand-alone sub-harmonic oscillator. The quadrature oscillator has been implemented in 0.25 um CMOS process and the measured results show that the proposed quadrature oscillator could achieve a phase noise of −130 dBc/Hz at 1 MHz offset from 1.13 GHz carrier while only drawing an 8.0 mA current from the 2.5 V power supply.     

FM noise reduction of Gunn-effect oscillators by injection locking

FM noise spectra measurements were performed on a Gunn oscillator under injection-locked conditions. The experimental results have shown good agreement with the theory not only qualitatively but quantitatively.     

Intrinsic 1/f device noise reduction and its effect on phase noisein CMOS ring oscillators

This paper gives experimental proof of an intriguing physical effect: periodic on-off switching of MOS transistors in a CMOS ring oscillator reduces their intrinsic 1/f noise and hence the oscillator's close-in phase noise. More specifically, it is shown that the 1/f³ phase noise is dependent on the gate-source voltage of the MOS transistors in the off state. Measurement results, corrected for waveform-dependent upconversion and effective bias, show an 8-dB-lower 1/f³ phase noise than expected. It will be shown that this can be attributed to the intrinsic 1/f noise reduction effect due to periodic on-off switching     

激光器对光电振荡器相位噪声的影响

为了改善光电振荡器相位噪声特性、提高光电振荡器性能,采用理论分析和实验验证的方法,研究了激光器线宽、光功率与光电振荡器相位噪声之间的关系.测试了激光器在功率相等、线宽不等情况下,光电振荡器所产生的微波信号的频谱特性和相位噪声特性;测试了给定线宽激光器在不等功率情况下,所产生的微波信号的相位噪声特性.结果表明,激光器线宽越窄、光功率越大,光电振荡器产生微波信号的频谱特性和相位噪声特性就越好;在频偏1kHz以外,相位噪声受激光器线宽影响较小,受光功率影响较大.这一结果对改善光电振荡器相位噪声有一定的帮助.     

Simple architecture low phase noise microwave cryogenic sapphire oscillators

The operation of a low phase noise 10.35 GHz microwave cryogenic sapphire resonator oscillator is demonstrated. Based on a very simple architecture, the oscillator presents phase noise performances of -104 dBrad²/Hz at f=10 Hz off the carrier (slope 1/f ³), lower than -152 dBrad²/Hz at f=1 kHz (slope 1/f), and of -160 dBrad²/Hz at fgsim10 kHz (white)     

一种实用的光电振荡器相位噪声测量系统

提出一种实用的光电振荡器的相位噪声测量系统和新的系统参数校准方法。该测量系统和校准方法所需器件少,成本低,可测量各种结构的光电振荡器。实验结果与理论分析取得良好的一致性。     

A filtering technique to lower LC oscillator phase noise

Based on a physical understanding of phase-noise mechanisms, a passive LC filter is found to lower the phase-noise factor in a differential oscillator to its fundamental minimum. Three fully integrated LC voltage-controlled oscillators (VCOs) serve as a proof of concept. Two 1.1-GHz VCOs achieve -153 dBc/Hz at 3 MHz offset, biased at 3.7 mA from 2.5 V. A 2.1-GHz VCO achieves -148 dBc/Hz at 15 MHz offset, taking 4 mA from a 2.7-V supply. All oscillators use fully integrated resonators, and the first two exceed discrete transistor modules in figure of merit. Practical aspects and repercussions of the technique are discussed