Low-energy pulsed laser treatment of silver nanoparticles for interconnects fabrication by ink-jet method

We report a rapid patterning method for interconnects fabrication combining the ink-jet printing of silver nanoparticles and laser sintering on the ceramic substrate. The optimal parameters of laser irradiation were found. As-fabricated interconnects on ceramic substrate possess a sheet resistance 0.38 Ω/sq and have good adhesion to substrate. Also, the pulsed laser annealing of silver particles after drying on polyimide substrate was investigated, and optimal parameters of laser irradiation were found to form peeling-free structures. The conductivity of as-prepared lines reached about 20% of bulk silver.     

Fabrication of low-loss thin film microstrip line on low-resistivity silicon for RF applications

A detail fabricating process and characterization of thin film microstrip line (TFML) on low K polyimide, used for interconnects in radio frequency integrated circuits (RFICs) technology, is reported in this study. By incorporating a spin-on dielectric polyimide and sputtering of aluminum, the TFML is fabricated on low-cost low-resistivity silicon (LRS) substrate (ρ?10 Ω cm). The TFML with a thickness of 20 μm polyimide dielectric layer presents attenuation losses of 0.385 dB/mm at 25 GHz and 0.438 dB/mm at 50 GHz. Effective dielectric constant and attenuation of TFML on polyimide are carefully investigated and discussed.     

Permittivity of modified polyimide layers on LTCC

In this work, the permittivity of a tailored compound material was investigated consisting of a polyimide matrix in which hollow glass microspheres with a mean diameter of 30 μm are implemented as filler material. Choosing this approach the dielectric constant compared to that of the pure polyimide material is further decreased due to the enclosed air targeted to improve the high-frequency performance of patch antennas operated in the GHz range. Furthermore, the thickness of one single layer can be increased substantially from a maximum of about 10 μm for pure polyimide films to values above 80 μm by simply adding this type of filler material to the liquid polyimide precursor so that cavities in LTCC (low temperature co-fired ceramics) substrates can be filled more reliable. Two different variations of this compound material with filler to polymer ratios of 1:7.5 and 1:10 are realized. Basically, the film thickness depends on the spin coating speed and the microsphere content, respectively. The high initial surface roughness can be decreased to an average value of about 3 μm by applying additional layers of pure polyimide on top enabling thin film technology. The dielectric constant of the complete substrate comprising the LTCC and the compound material is measured using a ring resonator in microstrip configuration. From the resonances occurring in the transmission S-parameter |S₂₁| spectrum between 1 and 10 GHz, the relative dielectric constant can be determined. Using 820 μm thick LTCC substrates the permittivity can be reduced from originally ε_r = 7.8-6.6. By applying numerical calculations, a reduced permittivity of the pure polymer film from ε_r = 3.3 to about 2.9 can be determined when adding the glass microspheres.     

A novel fabrication process of MEMS devices on polyimide flexible substrates

Micro-electro-mechanic-system (MEMS) devices on flexible substrate are important for non-planar and non-rigid surface applications. In this paper, a novel and cost-effective fabrication process for an 8 × 8 MEMS temperature sensor array with a lateral dimension of 2.5 mm × 5.5 mm on a polyimide flexible substrate is developed. A 40 μm thick polyimide substrate is formed on a rigid silicon wafer using as a mechanical carrier throughout the fabrication by four successive spin coating liquid polyimide. The arrayed temperature sensing elements made of 1200 Å sputtered platinum thin film on polyimide substrate show excellent linearity with a temperature coefficient of resistance of 0.0028/°C. The purposed sensor obtains a high sensitivity of 0.781 Ω/°C at 8 mA at constant drive current. Because of the low heat capacity and excellent thermal isolation, the temperature sensing element shows excellent high sensitivity and a fast thermal response. The finished devices are flexible enough to be folded and twisted achieving any desired shape and form. Employing spin-coated liquid polyimide substrate instead of solid polyimide sheet minimizes the thermal cycling as well as improves the production yield. This fabrication technique first introduces the spin-coated PDMS (Polydimethylsiloxane) interlayer between the silicon carrier and the polyimide substrate and makes the polyimide-based devices separate much easier and greatly simplifies the fabrication process with a high production yield. A non-successive two-stage cure procedure for the polyimide precursor is developed to meet low-temperature requirement of the PDMS interlayer. The fabrication procedure developed in this research is compatible with conventional MEMS technology through an optimized integration process. The novel flexible MEMS technology can benefit the development of other new flexible polyimide-based devices.     

A printing technology combining screen-printing with a wet-etching process for the gate electrodes of organic thin film transistors on a plastic substrate

We have developed a practical printing technology for the gate electrode of organic thin film transistors (OTFTs) by combining screen-printing with a wet-etching process using nano-silver (Ag) ink as a conducting material. An Ag film was deposited onto a PVP (polyvinylphenol)-coated PC (polycarbonate) plastic substrate by screen-printing with nano-Ag ink, where Ag content of 20 wt.% was mixed using a terpineol solvent. Subsequently, the film was cured at 200 °C for 60 min, and then finally wet-etched through patterned positive photo-resist masks. The screen-printed Ag electrode exhibited a minimum line width of ∼5 μm, a thickness of ∼65 nm, and a resistivity of ∼10⁻⁶ Ω cm, producing good geometrical and electrical characteristics for a gate electrode. Additionally, it also provided good step coverage with the PVP dielectric layer, and consequently leakage current between the gate and source/drain electrodes was eliminated. Moreover, the electrical characteristic of the screen-printed Ag electrode was not significantly changed even after a bending test in which the Ag electrodes were bent with a bending radius of 6 mm and 2500 iterations of cyclic bending. OTFTs with the screen-printed Ag electrode produced a saturation mobility of 0.13 cm²/Vs and a current on/off ratio of 1.79 × 10⁶, being comparable to those of an OTFT with a thermally evaporated Al gate electrode.     

Fabrication of microlens arrays using UV micro-stamping with soft roller and gas-pressurized platform

The conformal contact between the roller stamper and the thin flexible substrate is important for precisive replication of microstructures. In this study, we have proposed a novel mechanism which employs a soft roller stamper and a gas-pressurized platform to fabricate UV-cured polymeric microlens arrays on a continuous flexible substrate. The new facilities constructed in this study comprise a polydimethylsiloxane (PDMS) stamping roller, a gas-pressurized platform and an UV light source underneath the platform. The soft roller was made by casting a pre-polymer of PDMS in a plastic master of microlens array. During the rolling micro-stamping process, the microlens array cavity on the soft roller is first filled with liquid UV-curable resin. The roller stamper then rolls and stamps over the moving transparent thin polymeric substrate which is located on the gas-pressurized platform. At the same time, the UV light irradiates beneath the platform and cures the resin in the rolling zone. Thus, the microlens array patterns are successfully fabricated. The dimensions of the microlens are 115.5 μm in diameter, of, a sag height of 7.88 μm in sag height, and 200 μm in pitch size. This method developed in this work clearly demonstrates its potential of using the soft mold and the gas-pressurized platform for continuous mass production of films with microstructural patterns.     

Flexible embedded circuitry: A novel process for high density, cost effective electronics

Flexible electronics are starting to emerge with all-printed but also hybrid cost effective, smart electronic products that will find a wide range of applications in large quantities in our society. Such products have to be built on low cost substrate materials like PEN or PET foils. Because of the low thermal stability and limited chemical resistance of these foils, established interconnection technologies are not suitable. The current paper describes a novel technology for making electronic circuitry which does not need incompatible thermal and chemical processes during fabrication. The technology called ‘embedded circuitry’ uses laser ablation to write the circuitry patterns in the flexible foils. These patterns are subsequently filled with conductive pastes using mask-less squeegee filling techniques. Conducting lines in flexible PEN foil with widths down to 10 μm, line gaps down to 10 μm and resistances down to 0.1 Ω/mm are demonstrated. Finite element modeling and bending tests revealed good flexibility of this low cost circuitry. Also the circuitry can be directly used for chip attachment through flipchip bonding.     

Effects of the Ag content on the geometrical and electrical characteristics of the screen-printed etched gate electrodes of OTFTs using Ag ink

During the fabrication of gate electrodes by Ag ink screen-printing combined with a wet-etching process, the effects of the Ag content on the geometrical and electrical characteristics such as the thickness and surface roughness of gate electrode, step coverage with the gate dielectric, leakage current associated with the step coverage, and the electrical performance of organic thin film transistors (OTFTs) were investigated. An increase of Ag content resulted in the thick and densely-packed Ag electrode, which had a stable and excellent conductivity. But, the large thickness of Ag electrode caused the worse step coverage of PVP (polyvinylphenol) dielectric layer on the edge of the Ag gate electrode, therefore, for Ag contents more than 40 wt.%, MIM (metal-insulator-metal) devices and OTFTs with the Ag gate electrodes had very large leakage current (>10⁻⁴ A/cm²) and off-state current (>∼19 pA/μm) due to the poor step coverage of PVP dielectric layers, respectively. Finally, we found that an Ag content of 20-30 wt.% was suitable for the screen-printed etched gate electrode of OTFTs using Ag ink. This range generated a mobility of 0.18 cm²/V s, an on/off current of 5 × 10⁶, and an off-state current of 0.002 pA/μm, which are suitable to drive e-paper.     

Low temperature fabricated conductive lines on flexible substrate by inkjet printing

The optimal conditions of inkjet-printed nano-silver suspension and silver nitrate solution for fabricating continuous narrow conductive lines on a polyimide substrate are investigated by varying the driving pulse and droplet overlap. The dimensionless Weber number and Reynolds number are used to evaluate the droplet size after impact. It was found that the presence of a suspension of nanoparticles increases droplet diameter. With appropriate droplet overlap and driving pulse conditions, continuous lines of AgNO₃ with 24.3 μm in width and nano-silver suspension with 33 μm in width were fabricated. In addition, the effects of driving pulse voltage and droplet coverage on the bulging of as-printed conductive lines are also examined.     

Design and fabrication of a vibration sensor using a conductive ball

We have fabricated a MEMS-based vibration sensor with a conductive ball. The vibration sensor consisted of a conductive ball placed in a 600 μm deep anisotropically micromachined silicon cavity, two electrodes on the non-planar surface, and a cover glass for encapsulation. Before Au film deposition, the sharp convex corner at the upper edge of the cavity was rounded to deposit the metal film without disconnecting on the non-planar surface. The shadow-mask technique allowed for the simultaneous metal deposition and patterning on three-dimensional structures without the conventional photolithography. The frequency responses of the proposed MEMS-based vibration sensor using a conductive ball ranging from 0 to 30 Hz were stable.     

X-ray imager using solution processed organic transistor arrays and bulk heterojunction photodiodes on thin,flexible plastic substrate

We describe the fabrication and characterization of large-area active-matrix X-ray/photodetector array of high quality using organic photodiodes and organic transistors. All layers with the exception of the electrodes are solution processed. Because it is processed on a very thin plastic substrate of 25 μm thickness, the photodetector is only 100 μm thick. When combined with an 300-μm-thick X-ray scintillator, this gives a thin, low-weight and shatterproof X-ray detector of ca. 400 μm thickness. We demonstrate X-ray imaging under conditions that are used in medical applications.     

Flexible thin-film transistors using multistep UV nanoimprint lithography

A multistep imprinting process is presented for the fabrication of a bottom-contact, bottom-gate thin-film transistor (TFT) on poly(ethylene naphthalate) (PEN) foil by patterning all layers of the metal–insulator–metal stack by UV nanoimprint lithography (UV NIL). The flexible TFTs were fabricated on a planarization layer, patterned in a novel way by UV NIL, on a foil reversibly glued to a Si carrier. This planarization step enhances the dimensional stability and flatness of the foil and thus results in a thinner and more homogeneous residual layer. The fabricated TFTs have been electrically characterized as demonstrators of the here developed fully UV NIL-based patterning process on PEN foil, and compared to TFTs made on Si with the same process. TFTs with channel lengths from 5 μm down to 250 nm have been fabricated on Si and PEN foil, showing channel length-dependent charge carrier mobilities, μ, in the range of 0.06–0.92 cm² V⁻¹ s⁻¹ on Si and of 0.16–0.56 cm² V⁻¹ s⁻¹ on PEN foil.     

Observation of Ni silicide formations and field emission properties of Ni silicide nanowires

The Ni silicide nanowires were grown by physical vapor deposition. The morphological changes of silicide formation were observed on a gradient Ni film thickness, which visualized the critical thickness is 60-80 nm to grow nanowires. The field emission measurement provided uniform characteristics and high field enhancement factors were obtained to be 3180 and 3002 from the Ni silicide nanowires grown on a Si substrate and a tungsten plate, respectively. By using a conductive tungsten plate, the emission current was enhanced to be 172.5 μA/cm² comparing to 76.5 μA/cm² from a Si substrate at 5 V/μm.     

Patterning of SiO2 nanoparticle-PMMA polymer composite microstructures based on soft lithographic techniques

Soft lithography and self-assembly provide powerful means of organizing colloidal solution of synthesized nanoparticles (NPs) for a wide variety of application. Pattern transfer of silicon dioxide (SiO₂) nanoparticles-polymethylmethacylate (PMMA) nanocomposite was investigated using two such soft lithographic techniques, micro molding in capillaries (MIMIC) and micro transfer molding (μTM) using an elastomeric stamp in Polydimethyl siloxane (PDMS). Nanocomposite periodic arrays of 20 μm wide and 10 μm deep lines with 10 μm spacing were obtained over approximately 1 cm² area on silicon substrates by μTM and MIMIC using a 3 wt.% monodisperse silica nanoparticles (∼338 ± 2 nm) in polymethyl methacrylate (PMMA) solution. In addition, free standing nanocomposite self-standing films of centimeter size were also manufactured by μTM. Single line of nanocomposite could also be obtained using MIMIC with a lower concentration of silica NPs (0.25 wt.%) in PMMA.     

Direct metallization of gold patterns on polyimide substrate by microcontact printing and selective surface modification

Patterned gold microstructures were fabricated on a polymer substrate by a novel method involving selective electroless plating and microcontact printing. The micro-sized gold patterns were made by the site-selective chemical modification of polyimide substrate films using aqueous potassium hydroxide solution and microcontact printing with a pitch size in the range of 20-200 μm. The base-treated area of the polyimide film became hydrophilic in the regions where the ion-exchange reactions took place for the subsequent metallization. The hydrophilic patterns were sensitized by placing the film in a solution of PdCl₂ and, subsequently, the activated substrate was immersed in an electroless plating solution of Ni and Au to provide well-developed gold patterns on polyimide substrate films.     

Laser-assisted patterning of solution-processed oxide semiconductor thin film using a metal absorption layer

We present a method to pattern solution-processed oxide semiconductor thin films by all laser process. A metal thin film is first photoetched by a spatially-modulated pulsed Nd-YAG laser beam and this layer is then covered with a semiconductor film. Uniform irradiation by the same laser generates a thermo-elastic force on the underlying metal layer and this force serves to detach it from the substrate, leaving only a patterned semiconductor structure. Sharp-edged zinc-tin oxide (ZTO) patterns at the micrometer scales could be fabricated over a few square centimeters by a single pulse of 850 mJ. A mobility of 7.6 × 10⁻² cm² V⁻¹ s⁻¹, an on/off ratio higher than 10⁶, and an off-current of 1.91 × 10⁻¹¹ A were achieved from a thin film transistor (TFT) with the patterned ZTO channel. These values were similar to those from a reference TFT, demonstrating the feasibility of this patterning process for electronic devices.     

一种聚酰亚胺超低热导红外热敏悬浮微桥

热导极为微小的热敏悬空微桥结构的制作是集成非致冷热成像探测阵列热敏感单元研究的核心。由于没有现成的将聚酰亚胺制成微桥的工艺,采用准分子激光微刻蚀技术,使用聚酰亚胺材料,并采用铂作为敏感材料来制作微桥。对所制作的铂/聚酰亚胺微桥原理性样件的初步测试表明,铂/聚酰亚胺微桥的热导约3.98×10-7W/K,与理论计算值接近。铂薄膜与聚酰亚胺微桥附着良好,工艺可行。在0～10V的驱动电压下可观察到铂/聚酰亚胺微桥样件明显的自热效应,其电加热响应时间小于100ms。     

Thermal analysis of oxide-confined VCSEL arrays

A thermo-electric 3-D analysis of 980 nm vertical cavity surface emitting laser (VCSEL) arrays based on the finite element method (FEM) is presented in this paper. High performance VCSEL array structures with square mesas are modeled by applying a steady-state 3-D heat dissipation model. Several oxide aperture diameters (D_a), substrate thicknesses, current densities, array sizes, heat flux, and temperature profiles are considered. The analysis shows that the maximum internal temperature of a VCSEL array ranges from 306.5 K for a 20 μm D_a, 100 μm substrate thickness, 666 A/cm² current density, and a 1×1 array size to 412 K for a 5 μm D_a, 300 μm substrate thickness, 1200 A/cm² current density, and a 4×4 array size.     

Local damage free Si substrate ultra thinning for backside emission spectral analysis using OBPF for LSI failure mode detection

In this study, we focused on an emission spectral analysis using OBPF, since emission spectral analysis is possible even with weak emissions. We also developed Si substrate local damage free thinning by ablation laser processing, and alkali solution wet etching for Si backside emission spectral analysis. The emission spectral analysis using an OBPF was effective for estimating the LSI semiconductor device failure mode and was able to classify the three failure modes of: gate oxide thin film leakage, P-N junction leakage and nMOSFET saturation current (Idsat) where gate floating occurs. Furthermore, we were able to estimate the failure mode, including metal/metal line short mode, from power approximation formula: Y = aX^b of a photon count increase rate by rising applied voltage at a PEMs observation. Each failure mode has it’s own coefficient “b” value. These two techniques allow a much more precise estimation of the representative failure mode of LSI semiconductor devices. Next, we developed damage free and large area local Si substrate thinning for backside emission spectral analysis at an isolated point. This technique uses a 266 nm DUV pulse laser ablation process and Si substrate crystal anisotrophic wet etching by KOH alkali solution. We achieved a damage free thinning area of approximately 2.6 × 2.6 mm². In addition, we developed a very precise, nondestructive calculation method for Si substrate with thickness of less than 2.3 μm by combining the interference fringe of equal thickness with an optical microscope, and an SEM image from depth of primary electron penetrations. The emission spectral analysis using OBPF from Si substrate backside became possible as an addition to surface analysis by combining thinning techniques with thickness calculations. We succeeded in estimating the failure mode by backside emission spectral analysis using these techniques.     

Novel three-layer TiO2 nanoparticle stacking architecture for efficient dye-sensitized solar cells

In this work, we report a novel three-layer TiO₂ nanoparticle photoelectrode for dye-sensitized solar cells (DSSCs). In such a DSSC, a very thin front scattering layer (∼1 μm thick) composed of small nanoparticles (∼20 nm) and larger scattering nanoparticles (>100 nm) is inserted in front of the typical small-nanoparticle absorption layer and the large-nanoparticle back-scattering/reflection layer. Such a very thin front scattering layer having mixture of small/large nanoparticles provides a larger haze (i.e., stronger scattering) and yet still retains a high integrated transmittance. With effectively scattering portion of the incident light into larger oblique angles and therefore increasing optical paths and absorption, DSSC efficiencies are enhanced by 15.2%, compared to the conventional two-layer DSSCs.